TS1103
external VSENSE, op amp feedback action drives the
gate of M1 such that M1’s drain-source current is
equal to:
indicates the magnitude of the load current, the
TS1103’s Sꢅꢄꢆ output indicates the load current’s
direction. The SIGN output is a logic high when M1
is conducting current (VRS+ > VRS-). Alternatively, the
SIGN output is a logic low when M2 is conducting
current (VRS+ < VRS-). ꢂhe Sꢅꢄꢆ comparator’s
transfer characteristic is illustrated in Figure 1.
Unlike other current-sense amplifiers that implement
a OUT/SIGN arrangement, the TS1103 exhibits no
“dead zone” at ꢅLOAD switchover.
VSEꢆSE
ꢃꢅDSꢇM1ꢈ
ꢉ
RꢄAꢅꢆA
or
ꢅLꢀADꢃx RSEꢆSE
ꢅDSꢇM1ꢈ
ꢉ
RꢄAꢅꢆA
Since M1’s drain terminal is connected to ROUT, the
output voltage of the TS1103 at the OUT terminal is,
therefore;
Rꢀꢁꢂ
VꢀꢁꢂꢃꢉꢃꢅLꢀADꢃx RSEꢆSEꢃxꢃ
RꢄAꢅꢆA
When the voltage at the RS- terminal is greater than
the voltage at the RS+ terminal, the external
VSENSE voltage drop is impressed upon RGAINB.
The voltage drop across RGAINB is then converted
into a current by M2 that then produces an output
voltage across ROUT. In this design, when M1 is
conducting current (VRS+ > VRS-), the TS1103’s
internal amplifier holds M2 OFF. When M2 is
conducting current (VRS- > VRS+), the internal
amplifier holds M1 OFF. In either case, the disabled
FET does not contribute to the resultant output
voltage.
The current-sense amplifier’s gain accuracy is
therefore the ratio match of ROUT to RGAIN[A/B].
For each of the four gain options available, Table 1
lists the values for ROUT and RGAIN[A/B]. The
TS1103’s output stage is protected against input
overdrive by use of an output current-limiting circuit
of 3mA (typical) and a 7V internal clamp protection
circuit.
Figure 1: TS1103's SIGN Comparator Transfer
Characteristic.
100
10
Table 1: Internal Gain Setting Resistors (Typical
Values)
GAIN (V/V) RGAIN[A/B] (Ω) ROUT (Ω) Part Number
25
50
100
200
400
200
100
100
10k
10k
10k
20k
TS1103-25
TS1103-50
TS1103-100
TS1103-200
1
The SIGN Comparator Output
0.1
0.1
1
10
VSENSE (│VRS+ - VRS-│) - mV
Figure 2: SIGN Comparator Propagation Delay vs VSENSE
100
As shown in the ꢂS1103’s block diagram, the design
of the TS1103 incorporated one additional feature –
an analog comparator the inputs of which monitor
the internal amplifier’s differential output voltage.
While the voltage at the TS1103’s ꢀꢁꢂ terminal
.
Page 8
TS1103DS r1p0
RTFDS
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