TS1103
ꢂhe other attribute of the Sꢅꢄꢆ comparator’s
behavior is its propagation delay as a function of
applied VSENSE [(VRS+ - VRS-) or (VRS- - VRS+)]. As
shown in Figure ꢃ, the Sꢅꢄꢆ comparator’s
propagation delay behavior is symmetric regardless
of current-flow direction and is inversely proportional
to VSENSE
.
APPLICATIONS INFORMATION
Choosing the Sense Resistor
minimum power supply voltage is higher than 3.6V,
each of the four full-scale VSENSEs above can be
increased.
Selecting the optimal value for the external RSENSE
is based on the following criteria and for each
commentary follows:
3) Total Load Current Accuracy
1) RSENSE Voltage Loss
In
the
TS1103’s
linear
region
where
2) VOUT Swing vs. Applied Input Voltage at VRS+
and Desired VSENSE
3) Total ILOAD Accuracy
4) Circuit Efficiency and Power Dissipation
5) RSENSE Kelvin Connections
VOUT < VOUT(max), there are two specifications related
to the circuit’s accuracy: aꢈ the TS1103’s input offset
voltage (VOS(max) = 200μV) and b) its gain error
(GE(max) = 0.6%). An expression for the TS1103’s
total error is given by:
1) RSENSE Voltage Loss
VOUT = [GAIN x (1 ± GE) x VSENSE] ± (GAIN x VOS)
For lowest IR power dissipation in RSENSE, the
smallest usable resistor value for RSENSE should
be selected.
A large value for RSENSE permits the use of smaller
load currents to be measured more accurately
because the effects of offset voltages are less
significant when compared to larger VSENSE
voltages. Due care though should be exercised as
previously mentioned with large values of RSENSE.
2) VOUT Swing vs. Applied Input Voltage at VRS+
and Desired VSENSE
As there is no separate power supply pin for the
TS1103, the circuit draws its power from the voltage
at its RS+ and RS- terminals. Therefore, the signal
voltage at the OUT terminal is bounded by the
minimum voltage applied at the RS+ terminal.
4) Circuit Efficiency and Power Dissipation
IR losses in RSENSE can be large especially at high
load currents. It is important to select the smallest,
usable RSENSE value to minimize power dissipation
and to keep the physical size of RSENSE small. If
the external RSENSE is allowed to dissipate
significant power, then its inherent temperature
coefficient may alter its design center value, thereby
reducing load current measurement accuracy.
Precisely because the TS1103’s input stage was
designed to exhibit a very low input offset voltage,
small RSENSE values can be used to reduce power
dissipation and minimize local hot spots on the pcb.
Therefore,
VOUT(max) = VRS+(min) - VSENSE(max) – VOH(max)
and
V
ꢀꢁꢂꢃꢁmaxꢂ
RSEꢆSE
ꢄ
ꢄAꢅꢆ ꢊ ꢅLꢀADꢁmaxꢂ
5) RSENSE Kelvin Connections
where the full-scale VSENSE should be less than
VOUT(MAX)/ꢄAꢅꢆ at the application’s minimum RS+
terminal voltage. For best performance with a 3.6V
power supply, RSENSE should be chosen to
generate a VSENSE of: a) 120mV (for the 25V/V GAIN
option), b) 60mV (for the 50V/V GAIN option), c)
30mV (for the 100V/V GAIN option), or d) 15mV (for
the 200V/V GAIN option) at the full-scale ILOAD
current in each application. For the case where the
For optimal VSENSE accuracy in the presence of large
load currents, parasitic pcb track resistance should
be minimized. Kelvin-sense pcb connections
between RSENSE and the TS1103’s RS+ and RS-
terminals are strongly recommended. The drawing in
Figure 3 illustrates the connections between the
TS1103DS r1p0
Page 9
RTFDS
TOUCHSTONE [ TOUCHSTONE SEMICONDUCTOR INC ]
