TS1103
PIN FUNCTIONS
PIN LABEL
FUNCTION
Ground. Connect this pin to analog ground.
Comparator Output, push-pull; SIGN is HIGH for (VRS+ > VRS-) and LOW for (VRS- > VRS+).
Output Voltage. VOUT is proportional to VSENSE = (VRS+ - VRS-) or (VRS- - VRS+).
External Sense Resistor Load-Side Connection
1
2
3
4
5
6
GND
SIGN
OUT
RS-
VDD
RS+
Sꢅꢄꢆ Comparator External Power Supply Pin; Connect this pin to system’s logic VDD supply.
External Sense Resistor Power-Side Connection
BLOCK DIAGRAM
DESCRIPTION OF OPERATION
The internal configuration of the TS1103 – a
bidirectional high-side, current-sense amplifier – is a
variation of the TS1100 uni-directional current-sense
amplifier. In the design of the TS1103, the input
amplifier was reconfigured for fully differential
input/output operation and a second low-threshold p-
channel FET (M2) was added where the drain
terminal of M2 is also connected to ROUT.
Therefore, the behavior of the TS1103 for when
inverting input of the TS1103 (the RS- terminal), the
applied voltage is ILOAD x RSENSE. Since the RS-
terminal is the non-inverting input of the internal op
amp, op amp feedback action forces the inverting
input of the internal op amp to the same potential
(ILOAD x RSENSE). Therefore, the voltage drop
across RSENSE (VSENSE = VRS+ - VRS-) and the
voltage drop across RGAINA (at the RS+ terminal)
are equal. Necessary for gain ratio match, both
RGAINA and RGAINB are the same value.
VRS- > VRS+ is identical for when VRS+ > VRS-
.
Referring to the typical application circuit on Page 1,
the inputs of the TS1103’s differential input/output
amplifier are connected across an external RSENSE
resistor that is used to measure current. At the non-
Since p-channel M1’s source is connected to the
inverting input of the internal op amp and since the
voltage drop across RGAINA is the same as the
TS1103DS r1p0
Page 7
RTFDS
TOUCHSTONE [ TOUCHSTONE SEMICONDUCTOR INC ]
