TS1102
or
Table 1: Internal Gain Setting Resistors (Typical
Values)
ꢀLꢅAꢁ x RSEꢃSE
ꢀꢁS
ꢂ
RꢄAꢀꢃ
GAIN (V/V) RGAIN (Ω) ROUT (Ω) Part Number
25
50
100
200
400
200
100
100
10k
10k
10k
20k
TS1102-25
TS1102-50
TS1102-100
TS1102-200
Since the FET’s drain terminal is connected to ROUT
the output voltage of the TS1102 at the OUT
terminal is, therefore;
,
RꢅꢆT
VꢅꢆT ꢂ ꢀLꢅAꢁ x RSEꢃSE
x
To achieve its very-low input offset voltage
performance over temperature, VSENSE voltage,
and power supply voltage, the design of the
RꢄAꢀꢃ
The current-sense amplifier’s gain accuracy is
therefore the ratio match of ROUT to RGAIN. For each
of the four gain options available, Table 1 lists the
values for ROUT and RGAIN. The TS1102’s output
stage is protected against input overdrive by use of
an output current-limiting circuit of 3mA (typical) and
a 7V internal clamp protection circuit.
TS1102’s amplifier is chopper-stabilized,
a
commonly-used technique to reduce significantly the
input offset voltage of amplifiers. This method,
however, does employ the use of sampling
techniques and therefore residue of the TS1102’s
10kHz internal clock is contained in the TS1102’s
output voltage spectrum.
APPLICATIONS INFORMATION
Therefore,
Choosing the Sense Resistor
VOUT(max) = VRS+(min) - VSENSE(max) – VOH(max)
Selecting the optimal value for the external RSENSE
is based on the following criteria and for each
commentary follows:
and
VꢅꢆT ꢀmaxꢁ
RSEꢃSE
ꢂ
1) RSENSE Voltage Loss
2) VOUT Swing vs. Applied Input Voltage at VRS+
and Desired VSENSE
ꢄAꢀꢃ ꢇ ꢀLꢅAꢁꢀmaxꢁ
where the full-scale VSENSE should be less than
VOUT(MAX)/ꢄAꢀꢃ at the application’s minimum RS+
terminal voltage. For best performance with a 3.6V
power supply, RSENSE should be chosen to
generate a VSENSE of: a) 120mV (for the 25V/V GAIN
option), b) 60mV (for the 50V/V GAIN option), c)
30mV (for the 100V/V GAIN option), or d) 15mV (for
the 200V/V GAIN option) at the full-scale ILOAD(MAX)
current in each application. For the case where the
minimum power supply voltage is higher than 3.6V,
each of the four full-scale VSENSEs above can be
increased.
3) Total ILOAD Accuracy
4) Circuit Efficiency and Power Dissipation
5) RSENSE Kelvin Connections
6) Sense Resistor Composition
1) RSENSE Voltage Loss
For lowest IR voltage loss in RSENSE, the smallest
usable value for RSENSE should be selected.
2) VOUT Swing vs. Applied Input Voltage at VRS+
and Desired VSENSE
3) Total ILOAD Accuracy
As there is no separate power supply pin for the
TS1102, the circuit draws its power from the applied
voltage at both its RS+ and RS- terminals.
Therefore, the signal voltage at the OUT terminal is
bounded by the minimum supply voltage applied to
the TS1102.
In
the
TS1102’s
linear
region
where
VOUT < VOUT(MAX), there are two specifications related
to the circuit’s accuracy: a) the TS1102’s input offset
voltage (VOS = 200μV, max) and b) its gain error
(GE(max) = 0.5%).
Page 8
TS1102DS r1p0
RTFDS
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