TA8248K
Application Information And Application Method
1. Adjustment of voltage gain
The voltage gain G is obtained as follows by R1, R2 and R in Fig.1.
v
f
+ R1+ R2
R
f
= 20 log
G
v
+ R1
R
f
When R = 0 Ω,
Gv = 56.5dB (typ.)
f
When R = 120 Ω, Gv = 45dB (typ.)
f
Figure 1
By increasing R , reduction of G is possible. However, since the feedback increase is liable to produce
f
v
oscillation, it is recommended to use this at 40dB or over.
2. Thermal shut-down circuit
The thermal shut-down circuit is built in for the purpose of preventing the destruction of IC due to the
abnormal temperature rise when the heat radiation is insufficient.
The operation temperature is set at radiation Fin temperature 175°C (typ.). At this temperature or over the
bias is interrupted to prevent the destruction of IC.
3. Input stage
The input circuit of this IC is as shown in Fig.2.
PNP Tr : Q1 is provided in the input circuit so as to make its usage possible without the input coupling
capacitor.
However, at pin11 and 12, max 60 mV offset voltage is produced.
Application after checking volume slide noise is recommended.
For cutting the volume slide noise, insert the input capacitor : C in series to interrupt the DC component.
IN
Figure 2
3
2002-04-05
TOSHIBA [ TOSHIBA ]
