XC9103/XC9104/XC9105
Series
■
TYPICAL APPLICATION CIRCUIT
When obtaining V
DD
from a source other than V
OUT
,
please insert a capacitor C
IN
between the V
DD
pin and the
GND pin in order to provide stable operations.
Please place C
L
and C
IN
as close as to the V
OUT
and V
DD
pins respectively and also close to the GND pin.
Strengthen the wiring sufficiently. RSENSE should be
removed and shorted when the C
L
capacitor except for
ceramic or low ESR capacitor is used.
Insert R
B
and C
B
when using a bipolar
NPN Transistor.
■NOTES
ON USE
S
CE
ON
OFF
OFF
S
PWM
−
ON
OFF
CONDITIONS
Chip Disable
Duty=25%, PWM/PFM automatic switching
PWM
By using external signals, the control of the XC9105 series can be
alternated between PWM control and PWM/PFM automatic switching
control. By inputting a voltage of more than V
DD
-0.2V to the CE/PWM
pin, PWM control can be selected. On the other hand, PWM/PFM
automatic switching control can be selected by inputting a voltage of less
than V
DD
-1.0V.
With the XC9105, by connecting resistors of the same value (R
M1
, R
M2
) as
shown in the diagram to the left, it is possible to obtain chip disable with
S
CE
ON and, S
PWM
ON or OFF, PWM/PFM auto switching at Duty=25%
with S
CE
OFF & S
PWM
ON, & PFM control with both switches OFF.
Note:
When operating at V
DD
-1.8V and below (stepping-up from VIN=0.9V), it is
necessary to pull-up to V
DD
in order to allow the CE/PWM pin reach the
V
CEH
voltage level. Please make sure that the IC is in PWM control
(S
PWM
=OFF) when operations start. If S
PWM
is ON, there are times when
chip enable might not operate.
* Please select your external components carefully.
6/23
TOREX [ TOREX SEMICONDUCTOR ]
