02S_02XC61C（低電圧用） 02.09.12 14:23 ページ 135
XC61C
Series
■Marking
ꢀSSOT-24, SOT-23, SOT-89
w
q
r
e
q
w r
q
w e r
SSOT-24(SC-82)
(TOP VIEW)
SOT-23
(TOP VIEW)
SOT-89
(TOP VIEW)
2
q Represents the integer of the Output Voltage and Detect Voltage
CMOS Output (XC61CC series)
DESIGNATOR CONFIGURATION VOLTAGE (V)
N-Channel Open Drain Output (XC61CN series)
�
DESIGNATOR
CONFIGURATION
VOLTAGE (V)
A
B
K
L
CMOS
CMOS
0.w
1.w
N-ch
N-ch
0.w
1.w
w Represents the decimal number of the Detect Voltage
DESIGNATOR VOLTAGE DESIGNATOR VOLTAGE
e Based on internal standards�
( SSOT-24 excepted )
0
1
2
3
4
q.0
q.1
q.2
q.3
q.4
5
6
7
8
9
DESIGNATOR
3
q.5
q.6
q.7
q.8
q.9
r Represents the assembly lot no.�
Based on internal standards
ꢀTO-92
w
r
Represents the Detect Voltage
DESIGNATOR
q
Represents the output �
configuration
1
L
7
61C
1
5
7
61C
VOLTAGE�
OUTPUT�
CONFIGURATION
(V)
②�
③�
DESIGNATOR
2
3
4
5
6
2
3
4
6
0
1
9
5
0.9
1.5
C
N
CMOS
N-ch
Indicates Delay Time
DESIGNATOR
0
DELAY TIME�
�
No delay
t
Represents the Detect Voltage Accuracy
DESIGNATOR
DETECT VOLTAGE ACCURACY�
TO-92（L Type）�
(TOP VIEW)
TO-92（T Type）�
(TOP VIEW)
�
2
within 2％�
y
Represents a least significant �
digit of the produced year�
�
u
Denotes the production lot number�
0 to 9, A to Z repeated(G.I.J.O.Q.W excepted)
DESIGNATOR Produced year�
�
0
1
2000
2001
135
TOREX [ Torex Semiconductor ]
