XC61C
Series
■MARKING
RULE
●
SSOT-24, SOT-23, SOT-25,
SOT-89, USP-4
4
①
②
3
④
①
Represents integer of detect voltage and
CMOS Output (XC61CC series)
MARK
A
B
C
D
E
F
H
CONFIGURATION
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
VOLTAGE (V)
0.X
1.X
2.X
3.X
4.X
5.X
6.X
1
2
3
①
②
③ ④
N-Channel Open Drain Output (XC61CN series)
MARK
K
L
M
N
P
R
S
CONFIGURATION
N-ch
N-ch
N-ch
N-ch
N-ch
N-ch
N-ch
VOLTAGE (V)
0.X
1.X
2.X
3.X
4.X
5.X
6.X
1
2
5
①
②
4
③ ④
②Represents
decimal number of detect voltage
MARK
0
1
2
3
4
VOLTAGE (V)
X.0
X.1
X.2
X.3
X.4
MARK
5
6
7
8
9
VOLTAGE (V)
X.5
X.6
X.7
X.8
X.9
1
2
SOT-25
3
(TOP VIEW)
②
④
③Represents
delay time
(Except for SSOT-24)
MARK
DELAY TIME
No Delay Time
PRODUCT SERIES
XC61Cxxx0xxx
3
①
③
1
2
3
④Represents
production lot number
Based on the internal standard. (G, I, J, O, Q, W excepted)
USP-4
(TOP VIEW)
6/19
TOREX [ TOREX SEMICONDUCTOR ]
