TTP259
TonTouchTM
Preliminary
TPINTC[01EH]: Touch pad interrupt control register [R/W], default value [0000]
TPINTC
Bit Name
Read/Write
Bit3
TPCTIE
R/W
Bit2
TPCMPIE
R/W
Bit1
Bit0
-
-
-
-
TPCMPIE: Capacitor overcharge interrupt enable. (0: disable; 1: enable)
TPCTIE: Duty counter overflow interrupt enable. (0: disable; 1: enable)
TPINTF[01FH]: Touch pad request flag register [R/W], default value [0000]
TPINTF
Bit3
TPCTF
R/W
Bit2
TPCMF
R/W
Bit1
Bit0
Bit Name
-
-
-
-
Read/Write
TPCMPF: Capacitor overcharge flag. (0: inactive; 1: active)
TPCTF: Duty counter overflow flag. (0: inactive; 1: active)
TPCT0[215H]: Touch pad duty counter and latch data register 0 [R], default value [xxxx]
Register
Bit Name
Read/Write
Bit3
TPCT3/CT3 TPCT2/CT2 TPCT1/CT1 TPCT0/CT0
R/W R/W R/W R/W
Bit2
Bit1
Bit0
TPCT3~TPCT0: Duty counter 1st nibble data for counter read.
CT3~CT0: 1st nibble of reload latch data.
TPCT1[216H]: Touch pad duty counter and latch data register 1 [R], default value [xxxx]
Register
Bit Name
Read/Write
Bit3
TPCT7/CT7 TPCT6/CT6 TPCT5/CT5 TPCT4/CT4
R/W R/W R/W R/W
Bit2
Bit1
Bit0
TPCT7~TPCT4: Duty counter 2nd nibble data for counter read.
CT7~CT4: 2nd nibble of reload latch data.
TPCT2[217H]: Touch pad duty counter and latch data register 2 [R], default value [xxxx]
Register
Bit Name
Read/Write
Bit3
TPCT11/CT11 TPCT10/CT10 TPCT9/CT9 TPCT8/CT8
R/W R/W R/W R/W
Bit2
Bit1
Bit0
TPCT11~TPCT8: Duty counter 3rd nibble data for counter read.
CT11~CT8: 3rd nibble of reload latch data.
2015/05/25
Page 71 of 81
Ver: 1.1
TTELEC [ TT Electronics ]
