TTP258
Preliminary
TonTouchTM
016H
017H
018H
019H
01AH
01BH
01CH
01DH
01EH
01FH
200H
201H
202H
203H
204H
205H
206H
207H
208H
209H
20AH
20BH
20CH
20DH
20EH
20FH
210H
211H
212H
213H
214H
215H
216H
217H
218H
219H
21AH
300H
301H
302H
303H
304H
PCC
PC
PDC
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
1111
1111
1111
1111
xxxx
xxxx
xxxx
xxxx
0000
0000
0000
xxxx
xxxx
0000
xxxx
xxxx
----
I/O port C control register
I/O port C data register
I/O port D control register
I/O port D data register
PD
PWM1L
PWM1H
PWM2L
PWM2H
TPINTC
TPINTF
TCP1C
TCP1L
TCP1H
TCP2C
TCP2L
TCP2H
PAI
PWM1 duty low nibble data register
PWM1 duty high nibble data register
PWM2 duty low nibble data register
PWM2 duty high nibble data register
Touchpad interrupt enable control register
Touchpad interrupt request flag register
TCP1 Timer/counter control register
TCP1 Timer/counter data low register
TCP1 Timer/counter data high register
TCP2 Timer/counter control register
TCP2 Timer/counter data low register
TCP2 Timer/counter data high register
Port A pad data reading address
Port B pad data reading address
Port C pad data reading address
Port D pad data reading address
-
PBI
PCI
PDI
-
R
R
R
-
----
----
----
-
-
-
-
-
TCPFS
TBC
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0000
1111
0111
0000
0000
0000
0000
xxxx
xxxx
xxxx
0000
0000
0000
0000
0000
0000
xxxx
xxxx
xxxx
0000
TCP clock source FS pre-scale register
Time base control register
MCKS
TPCHS0
TPCHS1
TPCHS2
TPCTL
TPCT0
TPCT1
TPCT2
Modulation clock selector register
Touch pad channel selector register
Touch pad channel selector register
Touch pad channel selector register
Touch pad control register
Touch pad Duty counter 1st nibble
Touch pad Duty counter 2nd nibble
Touch pad Duty counter 3rd nibble
LDO fail flag
Touch pad C load
Special control register 0
Special control register 1
Touchkey output register for special function
Reset flag
LDOFLAG R/W
CSA
R/W
R/W
R/W
R/W
R/W
W
W
W
R/W
SPCON0
SPCON1
ODATA
RESETF
TBRB
MRO
CLRWDT
LVREN
Time base counter clear address
Mask option register write enable address
Clear WDT 2nd instruction
LVREN register
Note:
a. Default means initial value after power on or reset.
b. R is “read” only, W is “write” only, R/W is both of “read” & “write”.
16’/04/06
Page 10 of 44
Ver.: 1.2
TTELEC [ TT Electronics ]
