UCC1972/3
UCC2972/3
UCC3972/3
APPLICATION INFORMATION (cont.)
Referring to Fig. 5, at time t0 the control signal is trolling the duty cycle with a timer routine within the LCD’s
brought low and the voltage in the resonant tank begins software program.
to build. At time t1 there is sufficient voltage for the
LFD waveforms at 200Hz and 50% duty cycle are shown
lamp to strike and the feedback loop controls the lamp
in Fig. 6a. Fig. 6b show a time expanded photo of the
at rated current using a fixed current sense resistor.
same waveforms. Channel 1 is lamp voltage at 500V /div,
When the LFD signal is brought low at time T2, the
Channel 2 is lamp current at 20mA / div, and Channel 3 is
COMP output is low and the OUT pin stops switching.
the LFD control voltage. Since the photos are from a digi-
The resonant tank voltage decays until the lamp extin-
tal oscilloscope, alias exists in the waveforms.
guishes. If the on time were extended to t3 the average
Lamp Current Control Loop
lamp intensity would be increased accordingly, the next
low frequency cycle begins at time t4.
The current control loop for the CCFL circuit is discussed
in detail in Unitrode Application Note U-148 and is briefly
repeated here for completeness. A block diagram for the
current control loop is shown in Fig. 7.
The PWM modulator small signal gain is inversely propor-
tional to the internal saw tooth ramp and proportional to
the input voltage (the inductor’s current slope increases as
VBAT increases). The resonant tank and buck inductor
form a RLC filter at the center point of the push pull trans-
former. The effective L of the filter is dominated by buck in-
ductor and the effective C is approximately 8 times the
resonant capacitor (CRES) value. This occurs because the
reflected ballast capacitance is equal to CRES and the
equivalent capacitance at the push-pull center point is four
times the capacitance across the tank. The equivalent re-
sistance at the push-pull center point is equal to ¼ the
tank voltage squared divided by the lamp power. The cor-
ner frequency and Q of the filter are:
LAMP
VOLTAGE
LAMP
CURRENT
LFD
5V
CONTROL
SIGNAL
ON
OFF
0V
t0 t1
t2
t3
t4
Figure 5. Low frequency dimming timing waveforms.
The time relationship between the resonant and gating
frequency has been exaggerated so that the sinusoidal
waveforms can be depicted. In order to avoid visible
lamp flicker, the low frequency gating rate (t0-t4) should
be greater than 100Hz. To prevent “beat” frequency in-
terference, it may be advantageous to synchronize the
gating frequency to a multiple of the monitor scan rate
of the LCD display. This can be accomplished by con-
1
(13)
FCORNER
=
2p LBUCK ·8·CRES
2pFFILTER LBUCK
(14)
Q =
RFILTER
Figure 6b. Time expanded showing lamp strike and
feedback delay.
Figure 6a. LFD at 50% duty cycle.
11