Table 2−11. Registers Summary (Continued)
2
REGISTER NAME
I C SUBADDRESS
DEFAULT
R/W
Reserved
26h−27h
28h
Fast-switch control
Fast-switch overlay delay
Fast-switch SCART delay
Overlay delay
CCh
00h
00h
00h
00h
00h
00h
R/W
R/W
R/W
R/W
R/W
R/W
R/W
29h
2Ah
2Bh
SCART delay
2Ch
CTI delay
2Dh
CTI control
2Eh
Reserved
2Fh−30h
31h
GLCO/RTC
05h
00h
40h
00h
FFh
FFh
FFh
FFh
00h
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Sync control
32h
Output formatter 1
Output formatter 2
Output formatter 3
Output formatter 4
Output formatter 5
Output formatter 6
Clear lost lock detect
Status 1
33h
34h
35h
36h
37h
38h
39h
3Ah
Status 2
3Bh
R
AGC gain status
SCH phase status
Video standard status
GPIO input 1
3Ch−3Dh
3Eh
R
R
3Fh
R
40h
R
GPIO input 2
41h
R
Vertical line count
Reserved
42h−43h
44h−45h
46h
R
R
AFE coarse gain for CH1
AFE coarse gain for CH2
AFE coarse gain for CH3
AFE coarse gain for CH4
AFE fine gain for Pb_B
AFE fine gain for Y_G_Chroma
AFE fine gain for Pr_R
AFE fine gain for CVBS_Luma
Reserved
20h
20h
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
47h
48h
20h
49h
20h
4Ah−4Bh
4Ch−4Dh
4Eh−4Fh
50h−51h
52h−6Fh
70h
900h
900h
900h
900h
ROM version
R
Reserved
71h−73h
74h
AGC white peak processing
Reserved
00h
R/W
75h−77h
R = Read only
W = Write only
R/W = Read and write
NOTE: Register addresses not shown in the register map summary are reserved and must not be written to.
2−24
TI [ TEXAS INSTRUMENTS ]
