TUSB1310A
SLLSE32D–NOVEMBER 2010–REVISED MAY 2011
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5
DESIGN GUIDELINES
5.1 Chip Connection on PCB
Components should be placed close to the TUSB1310A to reduce the trace length of the interface
between the components and the TUSB1310A. If external capacitors can not accommodate a close
placement, shielding to ground is recommended.
USB Connector
DP
DM
90.9KW 1%
VBUS
10KW 1%
R1EXT
JTAG
JTAG
10KW 1%
R1EXTRTN
XI
Crystal
Connection
VSSOSC
XO
PIPE RX
ULPI
PIPE TX
Link Controller
Figure 5-1. Analog Pin Connections
5.1.1 USB Connector Pins Connection
Differential pair signals, DP/DM, SSTXP/SSTXN, SSRXP/SSRXN, should be kept as short as possible.
The differential pair traces should be trace-length matched and parallelism should be maintained. They
also need to minimize vias and corners and should avoid crossing plane splits and stubs.
Figure 5-2 and Figure 5-3 are for visual reference only.
28
DESIGN GUIDELINES
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