TS5A3159
1
W
SPDT ANALOG SWITCH
www.ti.com
SCDS174B − AUGUST 2004 – REVISED MAY 2005
ORDERING INFORMATION
TA
−40°C to 85°C
PACKAGE(1)
SOT (SOT-23) − DBV
SOT (SC-70) − DCK(2)
Tape and reel
Tape and reel
ORDERABLE PART NUMBER
TS5A3159DBVR
TS5A3159DCKR
TOP-SIDE MARKING(2)
JA8_
JA_
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
(2) DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN
V
+
VNO, VCOM
II/OK
INO, ICOM
VIN
IIK
Supply voltage range(2)
Analog voltage range(2)(3)(4)
Analog port diode current
ON−state switch current
ON−state peak switch current(5)
Digital input voltage range(2)(3)
Digital input clamp current
Continuous current through V+ or GND
Package thermal impedance(6)
VIN < 0
VNO, VCOM < 0 or VNO, VCOM > V+
VNO, VCOM = 0 to V+
−0.5
−0.5
−0.5
MAX
6.5
V+ + 0.5
±50
±200
±400
6.5
−50
±100
UNIT
V
V
mA
mA
mA
V
mA
mA
θ
JA
165
°C
Tstg
Storage temperature range
−65
150
°C
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to ground, unless otherwise specified.
(3) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(4) This value is limited to 5.5 V maximum.
(5) Pulse at 1 ms duration < 10% duty cycle.
(6) The package thermal impedance is calculated in accordance with JESD 51-7.
2
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