TRF6900
SINGLE-CHIP RF TRANSCEIVER
SLAS213C – SEPTEMBER 1999 – REVISED MAY 2000
phase detector and charge pumps (continued)
During normal operation (PLL locked), the acquisition aid charge pump is disabled and the maximum charge
pump current I
is determined by the nominal value I (see Figure 19).
PD_1
0
I
I
0
1
PD_1
Figure 19. Normal Operation Charge Pump Current, I
PD_1
Each time the PLL is in an unlocked condition, the acquisition aid charge pump generates current pulses I
.
PD_2
The I
current pulses are APLL times larger than I (see Figure 20).
PD_2
0
1
I
I
0
PD_1
PD_2
APLL
I
Figure 20. Acquisition Aid, I
, and Normal Operation, I
, Charge Pump Currents
PD_2
PD_1
programmable divider
The internal divider ratio, N, can be set to 256 or 512 via the C-word. Since a higher divider ratio adds additional
noise within the multiplication loop, the lowest divider ratio possible for the target application should be used.
loop filter
Loop filter designs are a balance between lock-time, noise, and spurious suppression. For the TRF6900,
common loop filter design rules can be used to determine an appropriate low-pass filter. Standard formulas can
rd
be used as a first approach to calculate a basic loop filter. Figure 21 illustrates a basic 3 -order loop filter.
VCO_TANK1
VCO_TANK2
14
C
3
13
R
10
2
PD_OUT1
PD_OUT2
L
1
C
3c
R
1
VCO
9
C
3d
C
C
4
2
C
1
2nd-Order Loop Filter
3rd-Order Loop Filter
rd
Figure 21. Basic 3 -Order Loop Filter Structure
For maximum suppression of the unwanted frequency components, the loop filter bandwidth should generally
be made as narrow as possible. At the same time, the filter bandwidth has to be wide enough to allow for the
2-FSK modulation and appropriate lock-time. A detailed simulation of the phase-locked loop should be
performed and later verified on PCB implementations.
20
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