TPS929160-Q1
ZHCSNG0 – APRIL 2023
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7.3.8.4 Reference Diagnostics in FAIL-SAFE states
The TPS929160-Q1 integrates diagnostics for REF resistor open and short fault in FAIL-SAFE state. The device
monitors the reference current I(REF) set by external resistor R(REF). Use 方程式 7 to calculate the I(REF)
.
If the current output from REF pin I(REF) is lower than I(REF_OPEN_th), the reference resistor open-circuit fault
is reported. The reference resistor short-circuit fault is reported if the voltage of REF pin V(REF) is lower than
V(REF_SHORT_th). The device pulls the ERR pin down with constant current sink and sets flag registers including
FLAG_REF and FLAG_ERR to 1.
The fault is latched in flag registers. After the REF pin I(REF) and V(REF_SHORT_th) recover to normal, the device
releases ERR pin pulldown automatically and the master controller must send CLRFAULT to clear FLAG_REF
and FLAG_ERR. The CLRFAULT automatically returns to 0.
In FAIL-SAFE state, the device turns off all output channels when reference fault is detected. The device
automatically recovers and turns on all enabled channel after fault removal.
7.3.8.5 Pre-Thermal Warning in FAIL-SAFE state
The TPS929160-Q1 has pre-thermal warning at typical 135°C in FAIL-SAFE state.
When the junction temperature T(J) of TPS929160-Q1 rises above pre-thermal warning threshold, the device
reports pre-thermal warning and sets the flag registers including FLAG_PRETSD and FLAG_ERR to 1.
The fault is latched in flag registers. When the junction temperature of TPS929160-Q1 falls below pre-thermal
warning threshold, the master controller must write 1 to CLRFAULT register to clear FLAG_PRETSD and
FLAG_ERR. The CLRFAULT bit automatically returns to 0.
7.3.8.6 Overtemperature Protection in FAIL-SAFE state
The TPS929160-Q1 has overtemperature protection at T(TSD1), typical 175°C in FAIL-SAFE state.
When device junction temperature T(J) further rises above overtemperature protection threshold, the device turns
off all output drivers, pulls the ERR pin low with constant current sink to report fault, and sets the flag registers
including FLAG_TSD and FLAG_ERR to 1.
The fault is latched in flag registers. When the junction temperature falls below T(TSD1) – T(TSD1_HYS), the device
resumes all outputs and releases ERR pin pulldown. The master controller must write 1 to CLRFAULT to clear
FLAG_TSD and FLAG_ERR. The CLRFAULT bit automatically returns to 0.
7.3.8.7 Overtemperature Shutdown in FAIL-SAFE state
When the T(J) rises too high above T(TSD2), typical 180°C typically, the TPS929160-Q1 turns off the internal linear
regulator, VLDO output to shutdown all the analog and digital circuit. The ERR pin is pulled down by constant
current sink to report the fault, and the FLAG_POR and FLAG_ERR are all set to 1.
When the T(J) drops below T(TSD2) – T(TSD2_HYS), the TPS929160-Q1 restarts from POR state with all the
registers cleared to default value and ERR pin released. The master controller must write 1 to CLRPOR to clear
both FLAG_POR and FLAG_ERR after fault removal. The CLRPOR bit automatically returns to 0.
7.3.8.8 LED Open-Circuit Diagnostics in FAIL-SAFE state
The TPS929160-Q1 integrates LED open-circuit diagnostics to allow users to monitor LED status real time in
FAIL-SAFE state. The device monitors voltage difference between SUPPLY and OUTXn to judge if there is any
open-circuit failure. The SUPPLY voltage is also monitored in parallel with programmable threshold to determine
if supply voltage is high enough for open-circuit diagnostics.
The open-circuit monitor is only effective during PWM-ON state with programmable minimal pulse width greater
than t(BLANK) + t(OPEN_deg). The t(BLANK) is programmed by register BLANK. If PWM on-time is less than t(BLANK)
+
t(OPEN_deg), the device does not report any open-circuit fault. When the device supply voltage V(SUPPLY) is below
the threshold V(LOWSUPTH) set by register LOWSUPTH, the LED open-circuit fault is not detected nor reported.
When the voltage difference V(SUPPLY) – V(OUTXn) is below threshold V(OPEN_th_rising) with duration longer
than t(BLANK) + t(OPEN_deg), and the device supply voltage V(SUPPLY) is above the threshold V(LOWSUPTH), the
Copyright © 2023 Texas Instruments Incorporated
English Data Sheet: SLVSG60
36
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