TPS79301, TPS79318
TPS79325, TPS79328, TPS793285
TPS79330, TPS79333, TPS793475
SLVS348H – JULY 2001 – REVISED OCTOBER 2004
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APPLICATION INFORMATION (continued)
Power Dissipation and Junction Temperature
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature
should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the
regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, P
D(max)
, and the actual dissipation, P
D
, which must be less than or
equal to P
D(max)
.
The maximum power dissipation limit is determined using Equation 1:
T max
*T
A
P
D(max)
+
J
R
QJA
Where:
•
•
•
T
J
max is the maximum allowable junction temperature.
R
θJA
is the thermal resistance junction-to-ambient for the package (see the Dissipation Ratings Table).
T
A
is the ambient temperature.
(1)
The regulator dissipation is calculated using Equation 2:
P
D
+
V
IN
*V
OUT
I
OUT
(2)
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the thermal
protection circuit.
Programming the TPS79301 Adjustable LDO Regulator
The output voltage of the TPS79301 adjustable regulator is programmed using an external resistor divider as
shown in Figure 23. The output voltage is calculated using Equation 3:
V
OUT
+
V
REF
1
)
R
1
R
2
(3)
Where:
•
V
REF
= 1.2246 V typ (the internal reference voltage)
Resistors R1 and R2 should be chosen for approximately 50-µA divider current. Lower value resistors can be
used for improved noise performance, but the solution consumes more power. Higher resistor values should be
avoided as leakage current into/out of FB across R1/R2 creates an offset voltage that artificially in-
creases/decreases the feedback voltage and thus erroneously decreases/increases V
OUT
. The recommended
design procedure is to choose R2 = 30.1 kΩ to set the divider current at 50 µA, C1 = 15 pF for stability, and then
calculate R1 using Equation 4:
V
OUT
R
1
+
R
2
V
ref
*
1
(4)
In order to improve the stability of the adjustable version, it is suggested that a small compensation capacitor be
placed between OUT and FB. For voltages <1.8 V, the value of this capacitor should be 100 pF. For voltages
>1.8 V, the approximate value of this capacitor can be calculated as shown in Equation 5:
(3 x 10
*7
) x (R
1
)
R
2
)
C
1
+
(R
1
x R
2
)
(5)
The suggested value of this capacitor for several resistor ratios is shown in the table below. If this capacitor is
not used (such as in a unity-gain configuration) or if an output voltage <1.8 V is chosen, then the minimum
recommended output capacitor is 4.7 µF instead of 2.2 µF.
10
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