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SLVS181H − DECEMBER 1998 − REVISED JANUARY 2004
APPLICATION INFORMATION
external capacitor requirements
Although not required, a 0.047 µF or larger ceramic bypass input capacitor, connected between IN and GND and located
close to the TPS763xx, is recommended to improve transient response and noise rejection. A higher-value electrolytic input
capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is located several inches
from the power source.
Like all low dropout regulators, the TPS763xx requires an output capacitor connected between OUT and GND to stabilize
the internal loop control. The minimum recommended capacitance value is 4.7 µF and the ESR (equivalent series
resistance) must be between 0.3 Ω and 10 Ω. Capacitor values 4.7 µF or larger are acceptable, provided the ESR is less
than 10 Ω. Solid tantalum electrolytic, aluminum electrolytic, and multilayer ceramic capacitors are all suitable, provided
they meet the requirements described above. Most of the commercially available 4.7 µF surface-mount solid tantalum
capacitors, including devices from Sprague, Kemet, and Nichico, meet the ESR requirements stated above.
CAPACITOR SELECTION
†
(1)
PART NO.
MFR.
KEMET
SPRAGUE
SPRAGUE
AVX
VALUE
4.7 µF
10 µF
10 µF
4.7 µF
MAX ESR
1.5 Ω
SIZE (H × L × W)
1.9 × 3.5 × 2.8
1.3 × 7.0 × 2.7
2.5 × 7.6 × 2.5
2.6 × 6.0 × 3.2
T494B475K016AS
195D106x0016x2T
695D106x003562T
1.5 Ω
1.3 Ω
0.6 Ω
TPSC475K035R0600
(1)
Size is in mm. ESR is maximum resistance in ohms at 100 kHz and T = 25°C. Listings are sorted by height.
A
output voltage programming
The output voltage of the TPS76301 adjustable regulator is programmed using an external resistor divider as shown in
Figure 21. The output voltage is calculated using:
R1
R2
ǒ1 )
Ǔ
(1)
V
+ 0.995 V
O
ref
Where:
ref = 1.192 V typ (the internal reference voltage)
0.995 is a constant used to center the load regulator (1%)
V
Resistors R1 and R2 should be chosen for approximately 7-µA divider current. Lower value resistors can be used but offer
no inherent advantage and waste more power. Higher values should be avoided as leakage currents at FB increase the
output voltage error. The recommended design procedure is to choose R2 = 169 kΩ to set the divider current at 7 µA and
then calculate R1 using:
V
O
R1 +
ǒ
* 1
Ǔ
R2
(2)
0.995 V
ref
13
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