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TPS61040DRVTG4 参数 Datasheet PDF下载

TPS61040DRVTG4图片预览
型号: TPS61040DRVTG4
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗DC / DC升压转换器采用SOT -23和儿子套餐 [LOW-POWER DC/DC BOOST CONVERTER IN SOT-23 AND SON PACKAGES]
分类和应用: 转换器稳压器开关式稳压器或控制器电源电路开关式控制器光电二极管升压转换器
文件页数/大小: 27 页 / 977 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TPS61040  
TPS61041  
www.ti.com  
SLVS413F OCTOBER 2002REVISED DECEMBER 2010  
INPUT CAPACITOR SELECTION  
For good input voltage filtering, low ESR ceramic capacitors are recommended. A 4.7 mF ceramic input capacitor  
is sufficient for most of the applications. For better input voltage filtering this value can be increased. See Table 5  
and typical applications for input capacitor recommendations.  
DIODE SELECTION  
To achieve high efficiency a Schottky diode should be used. The current rating of the diode should meet the  
peak current rating of the converter as it is calculated in the Peak Current Control section. Use the maximum  
value for ILIM for this calculation. See Table 6 and the typical applications for the selection of the Schottky diode.  
Table 6. Recommended Schottky Diode for Typical LCD Bias Supply (see Figure 15)  
DEVICE  
REVERSE VOLTAGE  
COMPONENT SUPPLIER  
ON Semiconductor MBR0530  
ON Semiconductor MBR0520  
ON Semiconductor MBRM120L  
Toshiba CRS02  
COMMENTS  
30 V  
20 V  
20 V  
30 V  
TPS61040/41  
High efficiency  
LAYOUT CONSIDERATIONS  
Typical for all switching power supplies, the layout is an important step in the design; especially at high peak  
currents and switching frequencies. If the layout is not carefully done, the regulator might show noise problems  
and duty cycle jitter.  
The input capacitor should be placed as close as possible to the input pin for good input voltage filtering. The  
inductor and diode should be placed as close as possible to the switch pin to minimize the noise coupling into  
other circuits. Because the feedback pin and network is a high-impedance circuit, the feedback network should  
be routed away from the inductor. The feedback pin and feedback network should be shielded with a ground  
plane or trace to minimize noise coupling into this circuit.  
Wide traces should be used for connections in bold as shown in Figure 15. A star ground connection or ground  
plane minimizes ground shifts and noise.  
D1  
L1  
V
O
C
FF  
R1  
V
V
IN  
SW  
FB  
IN  
C
O
C
IN  
R2  
EN  
GND  
Figure 15. Layout Diagram  
Copyright © 2002–2010, Texas Instruments Incorporated  
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Product Folder Link(s): TPS61040 TPS61041  
 
 
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