TPS54240
SLVSAA6 –APRIL 2010
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DETAILED DESCRIPTION
Fixed Frequency PWM Control
The TPS54240 uses an adjustable fixed frequency, peak current mode control. The output voltage is compared
through external resistors on the VSENSE pin to an internal voltage reference by an error amplifier which drives
the COMP pin. An internal oscillator initiates the turn on of the high side power switch. The error amplifier output
is compared to the high side power switch current. When the power switch current reaches the level set by the
COMP voltage, the power switch is turned off. The COMP pin voltage will increase and decrease as the output
current increases and decreases. The device implements a current limit by clamping the COMP pin voltage to a
maximum level. The Eco-Mode™ is implemented with a minimum clamp on the COMP pin.
Slope Compensation Output Current
The TPS54240 adds a compensating ramp to the switch current signal. This slope compensation prevents
sub-harmonic oscillations. The available peak inductor current remains constant over the full duty cycle range.
Pulse Skip Eco-Mode
The TPS54240 operates in a pulse skip Eco mode at light load currents to improve efficiency by reducing
switching and gate drive losses. The TPS54240 is designed so that if the output voltage is within regulation and
the peak switch current at the end of any switching cycle is below the pulse skipping current threshold, the
device enters Eco mode. This current threshold is the current level corresponding to a nominal COMP voltage or
500mV.
When in Eco-mode, the COMP pin voltage is clamped at 500mV and the high side MOSFET is inhibited. Further
decreases in load current or in output voltage can not drive the COMP pin below this clamp voltage level.
Since the device is not switching, the output voltage begins to decay. As the voltage control loop compensates
for the falling output voltage, the COMP pin voltage begins to rise. At this time, the high side MOSFET is enabled
and a switching pulse initiates on the next switching cycle. The peak current is set by the COMP pin voltage. The
output voltage re-charges the regulated value, then the peak switch current starts to decrease, and eventually
falls below the Eco mode threshold at which time the device again enters Eco mode.
For Eco mode operation, the TPS54240 senses peak current, not average or load current, so the load current
where the device enters Eco mode is dependent on the output inductor value. For example, the circuit in
Figure 49 enters Eco mode at about 5 mA of output current. When the load current is low and the output voltage
is within regulation, the device enters a sleep mode and draws only 138mA input quiescent current. The internal
PLL remains operating when in sleep mode. When operating at light load currents in the pulse skip mode, the
switching transitions occur synchronously with the external clock signal.
Low Dropout Operation and Bootstrap Voltage (BOOT)
The TPS54240 has an integrated boot regulator, and requires a small ceramic capacitor between the BOOT and
PH pins to provide the gate drive voltage for the high side MOSFET. The BOOT capacitor is refreshed when the
high side MOSFET is off and the low side diode conducts. The value of this ceramic capacitor should be 0.1mF.
A ceramic capacitor with an X7R or X5R grade dielectric with a voltage rating of 10V or higher is recommended
because of the stable characteristics overtemperature and voltage.
To improve drop out, the TPS54240 is designed to operate at 100% duty cycle as long as the BOOT to PH pin
voltage is greater than 2.1V. When the voltage from BOOT to PH drops below 2.1V, the high side MOSFET is
turned off using an UVLO circuit which allows the low side diode to conduct and refresh the charge on the BOOT
capacitor. Since the supply current sourced from the BOOT capacitor is low, the high side MOSFET can remain
on for more switching cycles than are required to refresh the capacitor, thus the effective duty cycle of the
switching regulator is high.
The effective duty cycle during dropout of the regulator is mainly influenced by the voltage drops across the
power MOSFET, inductor resistance, low side diode and printed circuit board resistance. During operating
conditions in which the input voltage drops and the regulator is operating in continuous conduction mode, the
high side MOSFET can remain on for 100% of the duty cycle to maintain output regulation, until the BOOT to PH
voltage falls below 2.1V.
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