TPS54231
www.ti.com .............................................................................................................................................................................................. SLUS851–OCTOBER 2008
1
CZ =
2´p ´ FZ1 ´ Rz
(26)
1
CP =
2´p ´ FP1 ´ Rz
(27)
For this design, the two 47-µF output capacitors are used. For ceramic capacitors, the actual output capacitance
is less than the rated value when the capacitors have a dc bias voltage applied. This is the case in a dc/dc
converter. The actual output capacitance may be as low as 54 µF. The combined ESR is approximately 0.001 Ω.
Using Equation 19 and Equation 20, the output stage gain and phase loss are equivalent as:
Gain = –5.9 dB
and
PL = –93.8 degrees
For 60 degrees of phase margin, Equation 21 requires 63.9 degrees of phase boost.
Equation 22, Equation 23, and Equation 24 are used to find the zero and pole frequencies of:
FZ1 = 5798 Hz
And
FP1 = 107.8 kHz
RZ, CZ, and CP are calculated using Equation 25, Equation 26, and Equation 27:
-6
2 ´ p ´ 25000 ´ 3.3 ´ 54 ´ 10 ´ 8 ´ 10
6
Rz =
Cz =
Cp =
= 22.7 kW
12 ´ 800 ´ 0.8
(28)
(29)
(30)
1
= 1203 pF
2 ´ p ´ 6010 ´ 29200
1
= 64 pF
2 ´ p ´ 103900 ´ 29200
Using standard values for R3, C6, and C7 in the application schematic of Figure 13:
R3 = 22.6 kΩ
C6 = 1200 pF
C7 = 56 pF
BOOTSTRAP CAPACITOR
Every TPS54231 design requires a bootstrap capacitor, C4. The bootstrap capacitor must be 0.1 µF. The
bootstrap capacitor is located between the PH pins and BOOT pin. The bootstrap capacitor should be a
high-quality ceramic type with X7R or X5R grade dielectric for temperature stability.
CATCH DIODE
The TPS54231 is designed to operate using an external catch diode between PH and GND. The selected diode
must meet the absolute maximum ratings for the application: Reverse voltage must be higher than the maximum
voltage at the PH pin, which is VINMAX + 0.5 V. Peak current must be greater than IOUTMAX plus on half the
peak to peak inductor current. Forward voltage drop should be small for higher efficiencies. It is important to note
that the catch diode conduction time is typically longer than the high-side FET on time, so attention paid to diode
parameters can make a marked improvement in overall efficiency. Additionally, check that the device chosen is
capable of dissipating the power losses. For this design, a Diodes, Inc. B240A is chosen, with a reverse voltage
of 40 V, forward current of 2 A, and a forward voltage drop of 0.5 V.
Copyright © 2008, Texas Instruments Incorporated
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