TPS54331-Q1
www.ti.com
SLVSAB5 –NOVEMBER 2010
ELECTROMAGNETIC INTERFERENCE (EMI) CONSIDERATIONS
As EMI becomes a rising concern in more and more applications, the internal design of the TPS54331 takes
measures to reduce the EMI. The high-side MOSFET gate drive is designed to reduce the PH pin voltage
ringing. The internal IC rails are isolated to decrease the noise sensitivity. A package bond wire scheme is used
to lower the parasitics effects.
To achieve the best EMI performance, external component selection and board layout are equally important.
Follow the Step by Step Design Procedure above to prevent potential EMI issues.
APPLICATION CURVES
100
90
80
70
60
50
40
100
90
V
= 7 V
V
= 7 V
V
= 14 V
IN
IN
IN
80
V
= 14 V
V
= 21 V
70
IN
IN
V
= 28 V
IN
V
= 21 V
60
50
IN
V
= 28 V
IN
40
30
20
30
20
10
0
10
0
0
0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2
- Output Current - A
0
0.5
2
1
3
1.5
2.5
I
I
- Output Current - A
O
O
Figure 15. TPS54331 Efficiency
Figure 16. TPS54331 Low Current Efficiency
1.004
3.38
I
= 0 A
O
1.0035
3.37
3.36
3.35
3.34
3.33
3.32
1.003
1.0025
1.002
I
= 3 A
O
I
= 1.5 A
O
V
= 28 V
IN
1.0015
1.001
V
= 21 V
IN
V
= 7 V
IN
1.0005
1
3.31
3.3
V
= 14 V
IN
0.9995
0.999
3.29
3.28
0.9985
0
0.5
1
I
1.5
2
2.5
3
3.5
0
5
10
15
20
25
30
- Output Current - A
V - Input Voltage -V
O
I
Figure 17. TPS54331 Load Regulation
Figure 18. TPS54331 Line Regulation
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