TPS5430-Q1
www.ti.com ................................................................................................................................................... SLVS751C–NOVEMBER 2007–REVISED JULY 2009
Catch Diode
The TPS5430 is designed to operate using an external catch diode between PH and GND. The selected diode
must meet the absolute maximum ratings for the application: reverse voltage must be higher than the maximum
voltage at the PH pin, which is VIN(MAX) + 0.5 V. Peak current must be greater than IOUT(MAX) plus one-half the
peak to peak inductor current. Forward voltage drop should be small for higher efficiencies. It is important to note
that the catch diode conduction time is typically longer than the high-side FET on time, so attention paid to diode
parameters can make a marked improvement in overall efficiency. Additionally, check that the device chosen is
capable of dissipating the power losses. For this design, a Diodes, Inc. B340A is chosen, with a reverse voltage
of 40 V, forward current of 3 A, and forward voltage drop of 0.5 V.
Additional Circuits
Figure 12 and Figure 13 show application circuits using wide input voltage ranges. The design parameters are
similar to those given for the design example, with a larger value output inductor and a lower closed loop
crossover frequency.
U1
TPS5430DDA
L1
22 mH
C2
0.01 mF
10-35 V
5 V
VIN
VIN
BOOT
VOUT
ENA
ENA
C1
4.7 mF
D1
B340A
+
C4
4.7 mF
C3
220 mF
NC
NC
PH
R1
10 kW
VSNS
GND
PwPd
C3 = Sanyo POSCAP 10TP220M
R2
3.24 kW
Figure 12. 10-V to 35-V Input to 5-V Output Application Circuit
U1
TPS5430DDA
L1
C2
9-21 V
5 V
VIN
VIN
BOOT
VOUT
ENA
ENA
C1
D1
B340A
+
C3
NC
NC
PH
R1
VSNS
GND
PwPd
C3 = Sanyo POSCAP 10TP220M
R2
Figure 13. 9-V to 21-V Input to 5-V Output Application Circuit
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