ꢀꢁ ꢂ ꢃꢄ ꢄꢅ ꢆ
SLUS563B − AUGUST 2003 − REVISED APRIL 2004
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
NO.
Gate drive voltage for the high side N-channel MOSFET. The BOOST voltage is 9 V greater than the input
voltage. A 0.1-µF ceramic capacitor should be connected from this pin to the SW pin.
BOOST
14
O
5-V reference. This pin should be bypassed to ground with a 0.1-µF ceramic capacitor. This pin may be used
BP5
3
O
O
with an external dc load of 1 mA or less.
10-V reference used for gate drive of the N-channel synchronous rectifier. This pin should be bypassed by a 1-µF
BP10
11
ceramic capacitor. This pin may be used with an external dc load of 1 mA or less.
Output of the error amplifier, input to the PWM comparator. A feedback network is connected from this pin to the
VFB pin to compensate the overall loop. The comp pin is internally clamped above the peak of the ramp to
improve large signal transient response.
COMP
HDRV
ILIM
8
O
O
I
Floating gate drive for the high-side N-channel MOSFET. This pin switches from BOOST (MOSFET on) to SW
(MOSFET off).
13
16
Current limit pin, used to set the overcurrent threshold. An internal current sink from this pin to ground sets a
voltage drop across an external resistor connected from this pin to VCC. The voltage on this pin is compared
to the voltage drop (VIN −SW) across the high side MOSFET during conduction.
EA_REF
LDRV
4
I
Non-inverting input to the error amplifier and used as the reference for the feedback loop.
Gate drive for the N-channel synchronous rectifier. This pin switches from BP10 (MOSFET on) to ground
(MOSFET off).
10
O
Power ground reference for the device. There should be a low-impedance path from this pin to the source(s)
of the lower MOSFET(s).
PGND
9
−
RT
2
5
I
A resistor is connected from this pin to ground to set the internal oscillator and switching frequency.
Signal ground reference for the device.
SGND
−
Soft-start programming pin. A capacitor connected from this pin to ground programs the soft-start time. The
capacitor is charged with an internal current source of 2.3 µA. The resulting voltage ramp on the SS pin is used
as a second non-inverting input to the error amplifier. Output voltage regulation is controlled by the SS voltage
ramp until the voltage on the SS pin reaches the internal reference voltage of 0.7 V. Pulling this pin low disables
the controller.
SS/SD
6
I
SW
12
1
I
I
This pin is connected to the switched node of the converter and used for overcurrent sensing.
Syncronization input for the device. This pin can be used to synchronize the oscillator to an external master
frequency. If synchronization is not used, connect this pin to SGND.
SYNC
Inverting input to the error amplifier. In normal operation the voltage on this pin is equal to the EA_REF reference
voltage.
VFB
VIN
7
I
I
15
Supply voltage for the device.
5
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