www.ti.com
..........................................................................................................................................................
SBVS050J – MAY 2004 – REVISED AUGUST 2008
ELECTRICAL CHARACTERISTICS
1.7V
≤
V
DD
≤
6.5V, R
LRESET
= 100kΩ, C
LRESET
= 50pF, over operating temperature range (T
J
= –40°C to +125°C), unless
otherwise noted. Typical values are at T
J
= +25°C.
PARAMETER
V
DD
Input supply range
TEST CONDITIONS
–40°C < T
J
< +125°C
0°C < T
J
< +85°C
V
DD
= 3.3V, RESET not asserted
MR, RESET, C
T
open
V
DD
= 6.5V, RESET not asserted
MR, RESET, C
T
open
1.3V
≤
V
DD
< 1.8V, I
OL
= 0.4mA
1.8V
≤
V
DD
≤
6.5V, I
OL
= 1.0mA
V
OL
(max) = 0.2V, I
RESET
= 15µA
TPS3808G01
V
IT
Negative-going
input threshold
accuracy
V
IT
≤
3.3V
3.3V < V
IT
≤
5.0V
V
IT
≤
3.3V
3.3V < V
IT
≤
5.0V
TPS3808G01
V
HYS
R
MR
I
SENSE
I
OH
C
IN
V
IL
V
IH
t
w
Hysteresis on V
IT
pin
Fixed versions
–40°C < T
J
< +85°C
70
V
SENSE
= V
IT
V
SENSE
= 6.5V
V
RESET
= 6.5V, RESET not asserted
C
T
pin
Other pins
V
IN
= 0V to V
DD
V
IN
= 0V to 6.5V
0
0.7 V
DD
SENSE
MR
C
T
= Open
t
d
RESET delay time
C
T
= V
DD
C
T
= 100pF
C
T
= 180nF
Propagation delay
t
pHL
θ
JA
(1)
High to low level
RESET delay
MR to RESET
SENSE to RESET
V
IH
= 0.7V
DD
, V
IL
= 0.3V
DD
V
IH
= 1.05V
IT
, V
IL
= 0.95V
IT
See
Timing Diagram
V
IH
= 1.05V
IT
, V
IL
= 0.95V
IT
V
IH
= 0.7V
DD
, V
IL
= 0.3V
DD
12
180
0.75
0.7
20
0.001
20
300
1.25
1.2
150
20
290
28
420
1.75
1.7
5
5
0.3 V
DD
V
DD
–25
1.7
300
–40°C < T
J
< +85°C
–40°C < T
J
< +85°C
–2.0
–1.5
–2.0
–1.25
–1.5
±1.0
±0.5
±1.0
±0.5
±0.5
1.5
1.0
1.0
90
25
MIN
1.7
1.65
2.4
2.7
TYP
MAX
6.5
6.5
5.0
6.0
0.3
0.4
0.8
+2.0
+1.5
+2.0
+1.25
+1.5
3.0
2.0
2.5
kΩ
nA
µA
nA
pF
V
µs
ms
ms
ms
s
ns
µs
°C/W
%V
IT
%
UNIT
V
µA
µA
V
V
V
I
DD
Supply current (current into V
DD
pin)
V
OL
Low-level output voltage
Power-up reset voltage
(1)
MR Internal pull-up resistance
Input current at
SENSE pin
RESET leakage current
Input capacitance,
any pin
MR logic low input
MR logic high input
Input pulse width
to RESET
TPS3808G01
Fixed versions
Thermal resistance, junction-to-ambient
The lowest supply voltage (V
DD
) at which RESET becomes active. T
rise(VDD)
≥
15µs/V.
Copyright © 2004–2008, Texas Instruments Incorporated
Product Folder Link(s):
3
TI [ TEXAS INSTRUMENTS ]
