SLVS165J – APRIL 1998 – REVISED APRIL 2013
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TPS382x-25
RESET
TPS382x-30
TPS382x-33
TPS382xA-33
TPS382x-50
V
OH
High-level output voltage
TPS3824-25
TPS3825-25
TPS3824-30
TPS3825-30
TPS3824-33
TPS3825-33
TPS3824-50
TPS3825-50
TPS3824-25
TPS3825-25
TPS3824-30
TPS3825-30
TPS3824-33
TPS3825-33
TPS3824-50
TPS3825-50
RESET
TPS382x-25
TPS382x-30
TPS382x-33
TPS382xA-33
TPS382x-50
Power-up reset voltage
(1)
TPS382x-25
TPS382x-30
TPS382x-33
TPS382xA-33
V
IT−
Negative-going input
threshold voltage
(2)
TPS382x-50
TPS382x-25
TPS382x-30
TPS382x-33
TPS382xA-33
TPS382x-50
TPS382x-25
TPS382x-30
V
hys
Hysteresis at V
DD
input
TPS382x-33
TPS382xA-33
TPS382x-50
I
IH(AV)
I
IL(AV)
I
IH
I
IL
Average high-level input current
Average low-level input current
High-level input current
WDI
WDI
MR
WDI
MR
WDI = V
DD
, time average (dc = 88%)
WDI = 0.3 V, V
DD
= 5.5 V time average (dc = 12%)
WDI = V
DD
MR = V
DD
× 0.7, V
DD
= 5.5 V
WDI = 0.3 V, V
DD
= 5.5 V
MR = 0.3 V, V
DD
= 5.5 V
50
120
–15
140
–40
140
–110
190
–60
190
–160
µA
30
mV
T
A
=
−
40°C to +85°C
T
A
= 0°C to +85°C
V
DD
= V
IT−
−
0.2 V, I
OL
= 3 mA
V
DD
≥
1.1 V, I
OL
= 20
μA
2.21
2.59
2.88
4.49
2.20
2.57
2.86
4.46
2.25
2.63
2.93
4.55
2.25
2.63
2.93
4.55
0.4
2.30
2.69
3
4.64
2.30
2.69
3
4.64
V
V
V
V
DD
= V
IT−
+ 0.2 V, I
OL
= 1 mA
V
DD
≥
1.8 V, I
OH
=
−150 μA
TEST CONDITIONS
V
DD
= V
IT−
+ 0.2 V, I
OH
=
−20 μA
V
DD
= V
IT−
+ 0.2 V, I
OH
=
−30 μA
V
DD
= V
IT−
+ 0.2 V I
OH
=
−120 μA
V
DD
≥
1.8 V, I
OH
=
−100 μA
0.8 × V
DD
V
MIN
TYP
MAX
UNIT
V
DD
−
1.5 V
RESET
0.8 × V
DD
V
RESET
V
DD
= V
IT−
+ 0.2 V, I
OL
= 1.2 mA
0.4
V
V
OL
Low-level output voltage
V
DD
= V
IT−
+ 0.2 V, I
OL
= 3 mA
V
DD
= V
IT−
−0.2
V, I
OL
= 1 mA
V
DD
= V
IT−
–0.2 V, I
OL
= 1.2 mA
0.4
V
µA
Low-level input current
µA
(1)
(2)
The lowest supply voltage at which RESET becomes active. t
r
, V
DD
≥
15
μs/V.
To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1
μF)
should be placed near the supply terminals.
Copyright © 1998–2013, Texas Instruments Incorporated
5
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