TPS3820 xx, TPS3823 xx,
TPS3824 xx, TPS3825 xx,
TPS3828 xx
SLVS165G − APRIL 1998 − REVISED JANUARY 2008
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ELECTRICAL CHARACTERISTICS (continued)
Over operating free-air temperature range, unless otherwise noted.
PARAMETER
IIH(AV)
IIL(AV)
Average high-level input current
WDI
Average low-level input current
WDI
IIH
High-level input current
MR
WDI
IIL
Low-level input current
MR
TPS382x-25
IOS
Output short-circuit
current
(1)
TPS382x-30
RESET
TPS382x-33
TPS382x-50
IDD
Supply current
Internal pullup resistor at MR
WDI and MR unconnected,
Outputs unconnected
15
52
VDD = VIT, max + 0.2 V,
VO = 0 V
−400
−800
25
µA
kΩ
pF
µA
A
TEST CONDITIONS
WDI = VDD,
time average (dc = 88%)
WDI = 0.3 V, VDD = 5.5 V
time average (dc = 12%)
WDI = VDD
MR = VDD
×
0.7,
VDD = 5.5 V
WDI = 0.3 V, VDD = 5.5 V
MR = 0.3 V, VDD = 5.5 V
MIN
TYP
120
−15
140
−40
140
−110
190
−60
190
−160
µA
MAX
UNIT
Ci
Input capacitance at MR, WDI
VI = 0 V to 5.5 V
5
(1) The RESET short-circuit current is the maximum pullup current when RESET is driven low by a
µP
bidirectional reset pin.
TIMING REQUIREMENTS AT R
L
= 1 MΩ, C
L
= 50 PF, T
A
= 25°C
At RL = 1 MΩ, CL = 50 pF, TA = +25°C.
PARAMETER
at VDD
tw
Pulse width
at MR
at WDI
VDD = VIT− + 0.2 V,
VDD
≥
VIT− + 0.2 V,
VDD
≥
VIT− + 0.2 V,
TEST CONDITIONS
VDD = VIT- − 0.2 V
VIL = 0.3 x VDD,
VIH = 0.7 x VDD
VIL = 0.3 x VDD,
VIH = 0.7 x VDD
MIN
6
1
100
MAX
UNIT
µs
µs
ns
SWITCHING CHARACTERISTICS
At RL = 1 MΩ, CL = 50 pF, TA = +25°C.
PARAMETER
TPS3820
ttout
td
Watchdog time out
Delay time
TPS3823/4/8
TPS3820
TPS3823/4/5/8
MR to RESET delay
(TPS3820/3/5/8)
VDD to RESET delay
TEST CONDITIONS
VDD
≥
VIT− + 0.2 V,
See timing diagram
VDD
≥
VIT− +0.2 V,
See timing diagram
VDD
≥
VIT− +0.2 V,
VIL = 0.3 x VDD,
VIH = 0.7 x VDD
VIL = VIT- - 0.2 V,
VIH = VIT- + 0.2 V
VDD
≥
VIT− +0.2 V,
VIL = 0.3 x VDD,
VIH = 0.7 x VDD
VIL = VIT- - 0.2 V,
VIH = VIT- + 0.2 V
MIN
112
0.9
15
120
TYP
200
1.6
25
200
MAX
310
2.5
37
300
0.1
µs
25
ms
UNIT
ms
s
tPHL
Propagation (delay) time,
high-to-low-level output
tPLH
Propagation (delay) time,
low-to-high-level output
MR to RESET delay (TPS3824/5)
0.1
µs
25
VDD to RESET delay (TPS3824/5)
6
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