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TPS3106xxx
TPS3110xxx
SLVS363D – AUGUST 2001 – REVISED NOVEMBER 2006
PIN DESCRIPTIONS
TPS3103
DBV PACKAGE
(TOP VIEW)
TPS3106
DBV PACKAGE
(TOP VIEW)
TPS3110
DBV PACKAGE
(TOP VIEW)
RESET
GND
MR
1
2
3
6
5
4
V
DD
PFO
PFI
RSTVDD
GND
MR
1
2
3
6
5
4
V
DD
RSTSENSE
SENSE
RESET
GND
MR
1
2
3
6
5
4
V
DD
WDI
SENSE
TERMINAL FUNCTIONS
TERMINAL
NAME
GND
MR
PFI
PFO
RESET
RSTSENSE
RSTVDD
SENSE
V
DD
WDI
DEVICE
ALL
ALL
TPS3103
TPS3103
TPS3103,
TPS3110
TPS3106
TPS3106
TPS3106,
TPS3110
ALL
TPS3110
NO.
2
3
4
5
1
5
1
4
6
5
DESCRIPTION
GND
Manual-reset input. Pull low to force a reset. RESET remains low as long as MR is low and for
the timeout period after MR goes high. Leave unconnected or connect to V
DD
when unused.
Power-fail input compares to 0.551 V with no additional delay. Connect to V
DD
if not used.
Power-fail output. Goes high when voltage at PFI rises above 0.551 V.
Active-low reset output. Either push-pull or open-drain output stage.
Active-low reset output. Logic level at RSTSENSE only depends on the voltage at SENSE and
the status of MR.
Active-low reset output. Logic level at RSTVDD only depends on the voltage at V
DD
and the
status of MR.
A reset will be asserted if the voltage at SENSE is lower than 0.551 V. Connect to V
DD
if
unused.
Supply voltage. Powers the device and monitors its own voltage.
Watchdog timer input. If WDI remains high or low longer than the time-out period, then reset is
triggered. The timer clears when reset is asserted or when WDI sees a rising edge or a falling
edge.
7
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