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TPS23750PWPRG4 参数 Datasheet PDF下载

TPS23750PWPRG4图片预览
型号: TPS23750PWPRG4
PDF下载: 下载PDF文件 查看货源
内容描述: 结合100 -V型IEEE 802.3af PD和DC / DC控制器 [INTEGRATED 100-V IEEE 802.3af PD AND DC/DC CONTROLLER]
分类和应用: 稳压器开关式稳压器或控制器电源电路开关式控制器光电二极管
文件页数/大小: 38 页 / 2852 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TPS23750
TPS23770
SLVS590A – JULY 2005 – REVISED AUGUST 2005
www.ti.com
ELECTRICAL CHARACTERISTICS
Characteristics are for: –40°C
T
J
125°C; V
DD
– V
SS
= 48 V. V
DD
, CLASS, and DET referenced to V
SS
, and all
other pin voltages are referenced to RSN, COM, and RTN shorted together unless otherwise noted.
SEN=MODE=BL=RSP=RTN, FB=V
BIAS
, SENP=V
DD
, C
TMR
= 1000 pF, C
VBIAS
= 0.1
µF,
C
VAUX
= 0.1
µF,
R
FREQ
= 150 kΩ, R
DET
= 24.9 kΩ, R
CLASS
= 255
Ω,
GATE is unloaded, and V
BIAS
and AUX have no external loads
unless otherwise noted.
DC/DC CONTROLLER SECTION
RTN = V
SS
for this section only.
PARAMETER
BIAS SUPPLY (VBIAS)
V
BIAS
V
AUX
Output voltage
0
I
LOAD
5 mA
18 V
V
VDD – COM
57 V, 0 mA
I
AUX
10 mA
V
AUX
= 0 V
R
FREQ
= 30 kΩ, V
COMP
= 3.9 V, MODE = V
BIAS
, Measure GATE
voltage at 50% rising to 50% falling
MODE = V
BIAS
, V
COMP
= 3 V, Measure at GATE
f
OSC
Oscillator frequency
R
FREQ
= 30 kΩ
R
FREQ
= 150 kΩ
ERROR AMPLIFIER (FB, COMP)
COMP source current
COMP sink current
V
REF
FB regulation voltage
Open loop voltage gain
Small signal unity gain bandwidth
COMP input resistance
FB leakage (source or sink)
SOFT START TIMER (TMR)
Source current
Ratio of source/sink current
ON duty cycle
CURRENT SENSE (RSP, RSN, BL)
Current limit threshold
Fault current threshold
MODE = V
BIAS
, V
COMP
= 4.2 V, V
TMR
= 2.5 V, Increase
V
RSP-RSN
until the duty cycle switches from 50% to the minimum
MODE = V
BIAS
, V
COMP
= 4.2 V, V
TMR
= 2.5 V, Increase
V
RSP-RSN
until no gate pulses occur
V
RSP – RSN
= 0.6 V, V
AUX
= 12 V, MODE = V
BIAS
, V
COMP
= 4.2 V,
V
TMR
= 2.5 V. Measure 50% of V
GATE
to 50% V
GATE
Minimum propagation delay, BL floating
t
BLNK
Current limit delay
Blanking period (pulse width above minimum), BL connected to
RSN
Blanking period (pulse width above minimum), BL connected to
V
BIAS
RSP current
GATE DRIVER (GATE)
Output voltage swing
Peak source current
Peak sink current
VOLTAGE TRANSLATOR (SEN, SENP)
(SENP - SEN) regulation voltage
V
TMR
= 2.5 V, Measure with servo loop that includes the error
amplifier
1.456
1.492
1.526
V
5 mA source, V
AUX
= 12 V
5 mA sink, V
AUX
= 12 V
V
AUX
= 12 V, pulse test
V
AUX
= 12 V, AC test or pulse test with TMR = RSN
0.33
0.7
0.58
1.0
11.9
0.05
0.8
1.3
V
A
A
FREQ = V
BIAS
, MODE = V
BIAS
, V
COMP
= 4 V,
V
RSP-RSN
= 0.4 V, I
RSP
sourcing
40
45
70
60
70
105
90
95
140
µA
ns
0.46
0.70
0.5
0.765
0.54
0.83
V
V
MODE = V
BIAS
, V
COMP
= 4.4 V, Second cycle and beyond
TMR charging, V
TMR
between lower threshold and clamp
38
9
8
50
10
9.1
62
11
10
µA
-
%
0
V
COMP
4 V, FB = RTN, V
TMR
= 2.5 V
1.2 V
V
COMP
V
BIAS
, V
TMR
= 2.5 V
V
COMP
= 2.5 V, V
TMR
= 2.5 V
1.2 V
V
COMP
4 V, V
TMR
= 2.5 V
V
COMP
= 2.5 V, V
TMR
= 2.5 V
MODE = V
BIAS
, 1.1
V
COMP
4.4, V
TMR
= 2.5 V
0
V
FB
V
BIAS
, V
TMR
= 2.5 V
2.5
2.4
1.47
80
1.5
70
2
100
130
1
1.50
1.53
mA
mA
V
dB
MHz
kΩ
µA
435
90
487
100
565
110
kHz
4.60
5.1
5.5
V
TEST CONDITIONS
MIN
TYP
MAX
UNIT
AUX SUPPLY (AUX)
Supply output voltage
Current limit
OSCILLATOR (FREQ)
D
MAX
Maximum duty cycle
48.8
49.2
49.5
%
9
12
10
23.5
11
28
V
mA
2.5
4
8
4