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SPRS230M – OCTOBER 2003 – REVISED MARCH 2011
List of Figures
2-1
2-2
2-3
2-4
2-5
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TMS320F2806 100-Pin PZ LQFP (Top View)
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TMS320F2802, TMS320F2801, TMS320C2802, TMS320C2801 100-Pin PZ LQFP (Top View)
.....................
TMS320F2801x 100-Pin PZ LQFP (Top View)
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TMS320F2809, TMS320F2808 100-Pin PZ LQFP (Top View)
TMS320F2809, TMS320F2808, TMS320F2806,TMS320F2802, TMS320F2801,
TMS320F28016, TMS320F28015, TMS320C2802, TMS320C2801
100-Ball GGM and ZGM MicroStar BGA™ (Bottom View)
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Functional Block Diagram
.......................................................................................................
F2809 Memory Map
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F2808 Memory Map
..............................................................................................................
F2806 Memory Map
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F2802, C2802 Memory Map
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F2801, F28015, F28016, C2801 Memory Map
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External and PIE Interrupt Sources
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3-1
3-2
3-3
3-4
3-5
3-6
3-7
3-8
3-9
3-10
3-11
3-12
3-13
3-14
4-1
4-2
4-3
4-4
4-5
4-6
4-7
4-8
4-9
4-10
4-11
4-12
4-13
4-14
4-15
4-16
4-17
5-1
6-1
6-2
6-3
6-4
6-5
6-6
6-7
6-8
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Clock and Reset Domains
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OSC and PLL Block Diagram
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Using a 3.3-V External Oscillator
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Using a 1.8-V External Oscillator
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Using the Internal Oscillator
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Watchdog Module
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CPU-Timers
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CPU-Timer Interrupt Signals and Output Signal
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Multiple PWM Modules in a 280x System
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ePWM Sub-Modules Showing Critical Internal Signal Interconnections
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eCAP Functional Block Diagram
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eQEP Functional Block Diagram
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Block Diagram of the ADC Module
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ADC Pin Connections With Internal Reference
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ADC Pin Connections With External Reference
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eCAN Block Diagram and Interface Circuit
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eCAN-A Memory Map
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eCAN-B Memory Map
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Serial Communications Interface (SCI) Module Block Diagram
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SPI Module Block Diagram (Slave Mode)
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I2C Peripheral Module Interfaces
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GPIO MUX Block Diagram
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Qualification Using Sampling Window
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Example of TMS320x280x/2801x Device Nomenclature
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Typical Operational Current Versus Frequency (F2808)
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Typical Operational Power Versus Frequency (F2808)
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Typical Operational Current Versus Frequency (C280x)
..................................................................
Typical Operational Power Versus Frequency (C280x)
...................................................................
Emulator Connection Without Signal Buffering for the DSP
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3.3-V Test Load Circuit
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Clock Timing
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Power-on Reset
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Multiplexing of Interrupts Using the PIE Block
List of Figures
5
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