SPRS439I – JUNE 2007 – REVISED MARCH 2011
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6.12
6.13
I2C Electrical Specification and Timing
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Serial Peripheral Interface (SPI) Timing
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6.13.1
Master Mode Timing
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8
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6.13.2 SPI Slave Mode Timing
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6.14 External Interface (XINTF) Timing
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6.14.1 USEREADY = 0
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6.14.2 Synchronous Mode (USEREADY = 1, READYMODE = 0)
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6.14.3 Asynchronous Mode (USEREADY = 1, READYMODE = 1)
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6.14.4 XINTF Signal Alignment to XCLKOUT
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6.14.5 External Interface Read Timing
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6.14.6 External Interface Write Timing
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6.14.7 External Interface Ready-on-Read Timing With One External Wait State
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6.14.8 External Interface Ready-on-Write Timing With One External Wait State
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6.14.9 XHOLD and XHOLDA Timing
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6.15 On-Chip Analog-to-Digital Converter
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6.15.1 ADC Power-Up Control Bit Timing
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6.15.2 Definitions
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6.15.3 Sequential Sampling Mode (Single-Channel) (SMODE = 0)
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6.15.4 Simultaneous Sampling Mode (Dual-Channel) (SMODE = 1)
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6.15.5 Detailed Descriptions
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6.16 Multichannel Buffered Serial Port (McBSP) Timing
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6.16.1 McBSP Transmit and Receive Timing
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6.16.2 McBSP as SPI Master or Slave Timing
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6.17 Flash Timing
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6.18 Migrating Between F2833x Devices and F2823x Devices
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Revision History
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Thermal/Mechanical Data
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