TMS320F28335, TMS320F28334, TMS320F28332
TMS320F28235, TMS320F28234, TMS320F28232
SPRS439I–JUNE 2007–REVISED MARCH 2011
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Figure 4-9 shows the ADC pin-biasing for internal reference and Figure 4-10 shows the ADC pin-biasing
for external reference.
ADCINA[7:0]
ADCINB[7:0]
ADCLO
ADC 16-Channel Analog Inputs
Analog input 0−3 V with respect to ADCLO
Connect to analog ground
Connect to analog ground if internal reference is used
ADCREFIN
22 k
ADC External Current Bias Resistor ADCRESEXT
2.2 μF(A)
ADC Reference Positive Output
ADC Reference Medium Output
ADCREFP
ADCREFM
ADCREFP and ADCREFM should not
be loaded by external circuitry
2.2 μF(A)
V
ADC Analog Power Pin (1.9 V/1.8 V)
ADC Analog Power Pin (1.9 V/1.8 V)
ADC Analog Ground Pin
DD1A18
V
DD2A18
V
V
SS1AGND
SS2AGND
ADC Analog Ground Pin
ADC Analog Power Pin (3.3 V)
ADC Analog Ground Pin
V
DDA2
V
SSA2
V
V
ADC Analog Power Pin (3.3 V)
ADC Analog I/O Ground Pin
DDAIO
Reference I/O Power
SSAIO
A. TAIYO YUDEN LMK212BJ225MG-T or equivalent
B. External decoupling capacitors are recommended on all power pins.
C. Analog inputs must be driven from an operational amplifier that does not degrade the ADC performance.
Figure 4-9. ADC Pin Connections With Internal Reference
80
Peripherals
Copyright © 2007–2011, Texas Instruments Incorporated
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TMS320F28232
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