欢迎访问ic37.com |
会员登录 免费注册
发布采购

TMS320F28335ZHHA 参数 Datasheet PDF下载

TMS320F28335ZHHA图片预览
型号: TMS320F28335ZHHA
PDF下载: 下载PDF文件 查看货源
内容描述: 数字信号控制器(DSC ) [Digital Signal Controllers (DSCs)]
分类和应用: 微控制器和处理器外围集成电路数字信号处理器装置PC时钟
文件页数/大小: 195 页 / 2496 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号TMS320F28335ZHHA的Datasheet PDF文件第117页浏览型号TMS320F28335ZHHA的Datasheet PDF文件第118页浏览型号TMS320F28335ZHHA的Datasheet PDF文件第119页浏览型号TMS320F28335ZHHA的Datasheet PDF文件第120页浏览型号TMS320F28335ZHHA的Datasheet PDF文件第122页浏览型号TMS320F28335ZHHA的Datasheet PDF文件第123页浏览型号TMS320F28335ZHHA的Datasheet PDF文件第124页浏览型号TMS320F28335ZHHA的Datasheet PDF文件第125页  
TMS320F28335, TMS320F28334, TMS320F28332  
TMS320F28235, TMS320F28234, TMS320F28232  
www.ti.com  
SPRS439IJUNE 2007REVISED MARCH 2011  
6.4.1 Reducing Current Consumption  
The 2833x/2823x DSCs incorporate a method to reduce the device current consumption. Since each  
peripheral unit has an individual clock-enable bit, reduction in current consumption can be achieved by  
turning off the clock to any peripheral module that is not used in a given application. Furthermore, any one  
of the three low-power modes could be taken advantage of to reduce the current consumption even  
further. Table 6-3 indicates the typical reduction in current consumption achieved by turning off the clocks.  
Table 6-3. Typical Current Consumption by Various  
Peripherals (at 150 MHz)(1)  
PERIPHERAL  
MODULE  
IDD CURRENT  
REDUCTION/MODULE (mA)(2)  
ADC  
I2C  
8(3)  
2.5  
5
eQEP  
ePWM  
eCAP  
SCI  
5
2
5
SPI  
4
eCAN  
McBSP  
CPU - Timer  
XINTF  
DMA  
8
7
2
10(4)  
10  
15  
FPU  
(1) All peripheral clocks are disabled upon reset. Writing to/reading from  
peripheral registers is possible only after the peripheral clocks are  
turned on.  
(2) For peripherals with multiple instances, the current quoted is per  
module. For example, the 5 mA number quoted for ePWM is for one  
ePWM module.  
(3) This number represents the current drawn by the digital portion of  
the ADC module. Turning off the clock to the ADC module results in  
the elimination of the current drawn by the analog portion of the ADC  
(IDDA18) as well.  
(4) Operating the XINTF bus has a significant effect on IDDIO current. It  
will increase considerably based on the following:  
How many address/data pins toggle from one cycle to another  
How fast they toggle  
Whether 16-bit or 32-bit interface is used and  
The load on these pins.  
Following are other methods to reduce power consumption further:  
The Flash module may be powered down if code is run off SARAM. This results in a current reduction  
of 35 mA (typical) in the VDD3VFL rail.  
IDDIO current consumption is reduced by 15 mA (typical) when XCLKOUT is turned off.  
Significant savings in IDDIO may be realized by disabling the pullups on pins that assume an output  
function and on XINTF pins. A savings of 35 mW (typical) can be achieved by this.  
The baseline IDD current (current when the core is executing a dummy loop with no peripherals enabled) is  
165 mA, (typical). To arrive at the IDD current for a given application, the current-drawn by the peripherals  
(enabled by that application) must be added to the baseline IDD current.  
Copyright © 2007–2011, Texas Instruments Incorporated  
Electrical Specifications  
121  
Submit Documentation Feedback  
Product Folder Link(s): TMS320F28335 TMS320F28334 TMS320F28332 TMS320F28235 TMS320F28234  
TMS320F28232  
 
 复制成功!