TMS320F28335, TMS320F28334, TMS320F28332
TMS320F28235, TMS320F28234, TMS320F28232
SPRS439I–JUNE 2007–REVISED MARCH 2011
www.ti.com
Table 4-17. GPIO-B Mux Peripheral Selection Matrix
REGISTER BITS
GPBDIR
PERIPHERAL SELECTION
GPBDAT
GPBSET
GPBCLR
GPBMUX1
GPBQSEL1
GPIOx
GPBMUX1 = 0, 0
PER1
GPBMUX1 = 0, 1
PER2
GPBMUX1 = 1, 0
PER3
GPBMUX1 = 1, 1
GPBTOGGLE
QUALPRD0
0
1
1, 0
GPIO32 (I/O)
GPIO33 (I/O)
GPIO34 (I/O)
GPIO35 (I/O)
GPIO36 (I/O)
GPIO37 (I/O)
GPIO38 (I/O)
GPIO39 (I/O)
GPIO40 (I/O)
GPIO41 (I/O)
GPIO42 (I/O)
GPIO43 (I/O)
GPIO44 (I/O)
GPIO45 (I/O)
GPIO46 (I/O)
GPIO47 (I/O)
SDAA (I/OC)(1)
SCLA (I/OC)(1)
ECAP1 (I/O)
SCITXDA (O)
SCIRXDA (I)
ECAP2 (I/O)
EPWMSYNCI (I)
ADCSOCAO (O)
ADCSOCBO (O)
3, 2
EPWMSYNCO (O)
2
5, 4
XREADY (I)
3
7, 6
XR/W (O)
XZCS0 (O)
XZCS7 (O)
XWE0 (O)
XA16 (O)
XA0/XWE1 (O)
XA1 (O)
4
9, 8
5
11, 10
13, 12
15, 14
17, 16
19, 18
21, 20
23, 22
25, 24
27, 26
29, 28
31, 30
6
7
QUALPRD1
8
9
10
11
12
13
14
15
XA2 (O)
Reserved
XA3 (O)
XA4 (O)
XA5 (O)
XA6 (O)
XA7 (O)
GPBMUX2
GPBQSEL2
GPBMUX2 = 0, 0
GPBMUX2 = 0, 1
GPBMUX2 = 1, 0
GPBMUX2 = 1, 1
QUALPRD2
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
1, 0
GPIO48 (I/O)
GPIO49 (I/O)
GPIO50 (I/O)
GPIO51 (I/O)
GPIO52 (I/O)
GPIO53 (I/O)
GPIO54 (I/O)
GPIO55 (I/O)
GPIO56 (I/O)
GPIO57 (I/O)
GPIO58 (I/O)
GPIO59 (I/O)
GPIO60 (I/O)
GPIO61 (I/O)
GPIO62 (I/O)
GPIO63 (I/O)
ECAP5 (I/O)
ECAP6 (I/O)
XD31 (I/O)
XD30 (I/O)
XD29 (I/O)
XD28 (I/O)
XD27 (I/O)
XD26 (I/O)
XD25 (I/O)
XD24 (I/O)
XD23 (I/O)
XD22 (I/O)
XD21 (I/O)
XD20 (I/O)
XD19 (I/O)
XD18 (I/O)
XD17 (I/O)
XD16 (I/O)
3, 2
5, 4
EQEP1A (I)
7, 6
EQEP1B (I)
9, 8
EQEP1S (I/O)
EQEP1I (I/O)
SPISIMOA (I/O)
SPISOMIA (I/O)
SPICLKA (I/O)
SPISTEA (I/O)
MCLKRA (I/O)
MFSRA (I/O)
MCLKRB (I/O)
MFSRB (I/O)
SCIRXDC (I)
SCITXDC (O)
11, 10
13, 12
15, 14
17, 16
19, 18
21, 20
23, 22
25, 24
27, 26
29, 28
31, 30
QUALPRD3
(1) Open drain
104
Peripherals
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