SPRS439I – JUNE 2007 – REVISED MARCH 2011
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Time−base (TB)
TBPRD shadow (16)
TBPRD active (16)
CTR=PRD
TBCTL[PHSEN]
Counter
up/down
(16 bit)
TBCTR
active (16)
16
8
Phase
control
CTR = PRD
CTR = ZERO
CTR = CMPA
CTR = CMPB
CTR_Dir
Event
trigger
and
interrupt
(ET)
EPWMxINT
EPWMxSOCA
EPWMxSOCB
EPWMxSYNCI
CTR=ZERO
CTR_Dir
TBPHSHR (8)
TBCTL[SWFSYNC]
(software forced sync)
CTR=ZERO
CTR=CMPB
Disabled
Sync
in/out
select
Mux
EPWMxSYNCO
TBCTL[SYNCOSEL]
TBPHS active (24)
Counter compare (CC)
CTR=CMPA
CMPAHR (8)
16
8
CMPA active (24)
Action
qualifier
(AQ)
HiRes PWM (HRPWM)
EPWMA
EPWMxAO
CMPA shadow (24)
CTR=CMPB
16
EPWMB
CMPB active (16)
CMPB shadow (16)
CTR = ZERO
Dead
band
(DB)
PWM
chopper
(PC)
Trip
zone
(TZ)
EPWMxBO
EPWMxTZINT
TZ1 to TZ6
Figure 4-5. ePWM Submodules Showing Critical Internal Signal Interconnections
72
Peripherals
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