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SPRS439I – JUNE 2007 – REVISED MARCH 2011
3.2.20 Control Peripherals
The 2833x/2823x devices support the following peripherals which are used for embedded control and
communication:
ePWM:
The enhanced PWM peripheral supports independent/complementary PWM
generation, adjustable dead-band generation for leading/trailing edges,
latched/cycle-by-cycle trip mechanism. Some of the PWM pins support HRPWM
features. The ePWM registers are supported by the DMA to reduce the overhead
for servicing this peripheral.
The enhanced capture peripheral uses a 32-bit time base and registers up to four
programmable events in continuous/one-shot capture modes.
This peripheral can also be configured to generate an auxiliary PWM signal.
The enhanced QEP peripheral uses a 32-bit position counter, supports low-speed
measurement using capture unit and high-speed measurement using a 32-bit unit
timer.
This peripheral has a watchdog timer to detect motor stall and input error detection
logic to identify simultaneous edge transition in QEP signals.
The ADC block is a 12-bit converter, single ended, 16-channels. It contains two
sample-and-hold units for simultaneous sampling. The ADC registers are supported
by the DMA to reduce the overhead for servicing this peripheral.
eCAP:
eQEP:
ADC:
3.2.21 Serial Port Peripherals
The devices support the following serial communication peripherals:
eCAN:
McBSP:
This is the enhanced version of the CAN peripheral. It supports 32 mailboxes, time
stamping of messages, and is CAN 2.0B-compliant.
The multichannel buffered serial port (McBSP) connects to E1/T1 lines,
phone-quality codecs for modem applications or high-quality stereo audio DAC
devices. The McBSP receive and transmit registers are supported by the DMA to
significantly reduce the overhead for servicing this peripheral. Each McBSP module
can be configured as an SPI as required.
The SPI is a high-speed, synchronous serial I/O port that allows a serial bit stream of
programmed length (one to sixteen bits) to be shifted into and out of the device at a
programmable bit-transfer rate. Normally, the SPI is used for communications
between the DSC and external peripherals or another processor. Typical
applications include external I/O or peripheral expansion through devices such as
shift registers, display drivers, and ADCs. Multi-device communications are
supported by the master/slave operation of the SPI. On the 2833x/2823x, the SPI
contains a 16-level receive and transmit FIFO for reducing interrupt servicing
overhead.
The serial communications interface is a two-wire asynchronous serial port,
commonly known as UART. The SCI contains a 16-level receive and transmit FIFO
for reducing interrupt servicing overhead.
The inter-integrated circuit (I2C) module provides an interface between a DSC and
other devices compliant with Philips Semiconductors Inter-IC bus (I2C-bus)
specification version 2.1 and connected by way of an I2C-bus. External components
attached to this 2-wire serial bus can transmit/receive up to 8-bit data to/from the
DSC through the I2C module. On the 2833x/2823x, the I2C contains a 16-level
receive and transmit FIFO for reducing interrupt servicing overhead.
SPI:
SCI:
I2C:
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Functional Overview
49
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