TMS320VC5416ZGU160 参数 Datasheet PDF下载

TMS320VC5416

Fixed-Point Digital Signal Processor

SPRS095O – MARCH 1999 – REVISED JANUARY 2005

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Reset and BIO Timings

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Interrupt Timing

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Instruction Acquisition (IAQ) and Interrupt Acknowledge (IACK) Timings

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External Flag (XF) Timing

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TOUT Timing

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McBSP Receive Timings

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McBSP Transmit Timings

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McBSP General-Purpose I/O Timings

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McBSP Timing as SPI Master or Slave: CLKSTP = 10b, CLKXP = 0

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McBSP Timing as SPI Master or Slave: CLKSTP = 11b, CLKXP = 0

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McBSP Timing as SPI Master or Slave: CLKSTP = 10b, CLKXP = 1

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McBSP Timing as SPI Master or Slave: CLKSTP = 11b, CLKXP = 1

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Using HDS to Control Accesses (HCS Always Low)

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Using HCS to Control Accesses

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HINT Timing

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GPIOx Timings

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Nonmultiplexed Read Timings

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Nonmultiplexed Write Timings

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HRDY Relative to CLKOUT

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MP/MC Timing

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List of Figures