ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢆꢇ ꢃꢃ
ꢈ ꢉꢊ ꢉꢀꢋ ꢌ ꢂꢉ ꢊꢍ ꢋ ꢌ ꢎ ꢏꢐ ꢇꢑ ꢂꢂ ꢐꢏ
SPRS087E − FEBRUARY 1999 − REVISED JANUARY 2004
†
Terminal Assignments (Alphabetical)
SIGNAL
NAME
PIN
NUMBER
SIGNAL
NAME
PIN
NUMBER
SIGNAL
NAME
PIN
NUMBER
SIGNAL
NAME
PIN
NUMBER
A0
A1
30
29
27
26
24
22
21
20
19
17
16
14
13
11
D0
D1
93
92
91
90
88
87
85
84
82
81
79
78
76
75
74
73
71
70
68
67
65
64
62
61
59
58
57
55
54
52
51
50
104
6
31
37
R/W
RDY
42
45
A2
D2
43
RESET
RSV0
RSV1
SHZ
127
139
138
128
41
A3
D3
53
A4
D4
60
A5
D5
69
A6
D6
77
STRB
TCK
DV
DD
A7
D7
86
98
A8
D8
94
TCLK0
TCLK1
TDI
114
113
100
99
A9
D9
108
115
129
143
111
124
96
A10
A11
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
DR0
TDO
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
CLKMD0
CLKMD1
CLKR0
CLKX0
TMS
102
103
2
DX0
TRST
10
8
EDGEMODE
EMU0
EMU1
EXTCLK
FSR0
9
7
95
18
5
130
106
110
38
25
4
34
3
FSX0
40
1
H1
49
144
142
141
136
135
107
109
12
28
46
66
83
101
123
137
H3
39
56
HOLD
HOLDA
IACK
47
63
V
SS
48
72
44
80
INT0
122
121
120
119
125
36
89
INT1
97
INT2
105
112
118
126
140
133
132
117
116
INT3
MCBL/MP
PAGE0
PAGE1
PAGE2
PAGE3
35
CV
DD
DD
33
XIN
XOUT
XF0
32
‡
15
23
PLLV
PLLV
131
134
DV
DD
DD
‡
XF1
SS
†
‡
DV
is the power supply for the I/O pins while CV
DD
is the power supply for the core CPU. V is the ground for both the I/O pins and the core
SS
CPU.
PLLV
and PLLV
SS
are isolated PLL supply pins that should be externally connected to CV
and V respectively.
SS,
DD
DD
4
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
TI [ TEXAS INSTRUMENTS ]
