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TMS320VC5407PGE 参数 Datasheet PDF下载

TMS320VC5407PGE图片预览
型号: TMS320VC5407PGE
PDF下载: 下载PDF文件 查看货源
内容描述: 定点数字信号处理器 [Fixed-Point Digital Signal Processors]
分类和应用: 数字信号处理器
文件页数/大小: 110 页 / 1351 K
品牌: TI [ TEXAS INSTRUMENTS ]
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Electrical Specifications  
X1  
X2/CLKIN  
Crystal  
C1  
C2  
Figure 52. Internal Divide-by-Two Clock Option With External Crystal  
5.7 Clock Options  
The frequency of the reference clock provided at the CLKIN pin can be divided by a factor of two or four or  
multiplied by one of several values to generate the internal machine cycle.  
5.7.1 Divide-By-Two and Divide-By-Four Clock Options  
The frequency of the reference clock provided at the X2/CLKIN pin can be divided by a factor of two or four  
to generate the internal machine cycle. The selection of the clock mode is described in Section 3.10.  
When an external clock source is used, the frequency injected must conform to specifications listed in  
Table 54.  
An external frequency source can be used by applying an input clock to X2/CLKIN with X1 left unconnected.  
Table 53 shows the configuration options for the CLKMD pins that generate the external divide-by-2 or  
divide-by-4 clock option.  
Table 53. Clock Mode Pin Settings for the Divide-By-2 and By Divide-by-4 Clock Options  
CLKMD1  
CLKMD2  
CLKMD3  
CLOCK MODE  
1/2, PLL and oscillator disabled  
0
1
1
0
0
1
0
1
1
1/4, PLL and oscillator disabled  
1/2, PLL and oscillator disabled  
73  
November 2001 Revised April 2004  
SPRS007D  
 
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