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TMS320VC5407PGE 参数 Datasheet PDF下载

TMS320VC5407PGE图片预览
型号: TMS320VC5407PGE
PDF下载: 下载PDF文件 查看货源
内容描述: 定点数字信号处理器 [Fixed-Point Digital Signal Processors]
分类和应用: 数字信号处理器
文件页数/大小: 110 页 / 1351 K
品牌: TI [ TEXAS INSTRUMENTS ]
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Functional Overview  
Hex  
7F0000  
Hex  
010000  
Program  
Program  
Hex  
020000  
Hex  
030000  
Hex  
040000  
Program  
Program  
Program  
External  
External  
External  
External  
External  
7F3FFF  
7F4000  
013FFF  
014000  
023FFF  
024000  
033FFF  
034000  
043FFF  
044000  
......  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
(OVLY = 1)  
(OVLY = 1)  
(OVLY = 1)  
(OVLY = 1)  
(OVLY = 1)  
External  
(OVLY = 0)  
External  
(OVLY = 0)  
External  
(OVLY = 0)  
External  
(OVLY = 0)  
External  
(OVLY = 0)  
017FFF  
018000  
027FFF  
028000  
037FFF  
038000  
047FFF  
048000  
7F7FFF  
7F8000  
On-Chip  
ROM  
Reserved  
External  
External  
External  
Reserved  
03DFFF  
03E000  
03FFFF  
01FFFF  
7FFFFF  
02FFFF  
04FFFF  
Page 1  
XPC=1  
Page 2  
XPC=2  
Page 127  
XPC=7Fh  
Page 3  
XPC=3  
Page 4  
XPC=4  
The lower 16K words of pages 1 through 127 are only available when the OVLY bit is cleared to 0. If the OVLY bit is set to 1, the on-chip memory  
is mapped to the lower 16K words of all program space pages.  
Figure 35. 5404 Extended Program Memory Map  
3.5.3 Relocatable Interrupt Vector Table  
The reset, interrupt, and trap vectors are addressed in program space. These vectors are soft — meaning that  
the processor, when taking the trap, loads the program counter (PC) with the trap address and executes the  
code at the vector location. Four words, either two 1-word instructions or one 2-word instruction, are reserved  
at each vector location to accommodate a delayed branch instruction which allows branching to the  
appropriate interrupt service routine without the overhead.  
At device reset, the reset, interrupt, and trap vectors are mapped to address FF80h in program space.  
However, these vectors can be remapped to the beginning of any 128-word page in program space after  
device reset. This is done by loading the interrupt vector pointer (IPTR) bits in the PMST register with the  
appropriate 128-word page boundary address. After loading IPTR, any user interrupt or trap vector is mapped  
to the new 128-word page.  
NOTE: The hardware reset (RS) vector cannot be remapped because the hardware reset loads the IPTR  
with 1s. Therefore, the reset vector is always fetched at location FF80h in program space.  
28  
SPRS007D  
November 2001 Revised April 2004  
 
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