TMS320F2812ZHHAR 参数 Datasheet PDF下载

www.ti.com

SPRS174S – APRIL 2001 – REVISED MARCH 2011

IFR[12:1]

INT1

INT2

IER[12:1]

INTM

1

MUX

INT11

INT12

(Flag)

(Enable)

INTx.1

INTx.2

INTx.3

INTx.4

INTx.5

INTx.6

INTx.7

INTx.8

(Enable)

(Enable/Flag)

PIEIERx[8:1]

(Flag)

PIEIFRx[8:1]

CPU

0

Global

Enable

INTx

MUX

From

Peripherals

or

External

Interrupts

PIEACKx

Figure 3-7. Multiplexing of Interrupts Using the PIE Block

Table 3-12. PIE Peripheral Interrupts

(1)

CPU

INTERRUPTS

INT1

INT2

INT3

INT4

INT5

INT6

INT7

INT8

INT9

INT10

INT11

INT12

(1)

PIE INTERRUPTS

INTx.8

WAKEINT

(LPM/WD)

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

INTx.7

TINT0

(TIMER 0)

T1OFINT

(EV-A)

CAPINT3

(EV-A)

T3OFINT

(EV-B)

CAPINT6

(EV-B)

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

INTx.6

ADCINT

(ADC)

T1UFINT

(EV-A)

CAPINT2

(EV-A)

T3UFINT

(EV-B)

CAPINT5

(EV-B)

MXINT

(McBSP)

Reserved

Reserved

ECAN1INT

(CAN)

Reserved

Reserved

Reserved

INTx.5

XINT2

T1CINT

(EV-A)

CAPINT1

(EV-A)

T3CINT

(EV-B)

CAPINT4

(EV-B)

MRINT

(McBSP)

Reserved

Reserved

ECAN0INT

(CAN)

Reserved

Reserved

Reserved

INTx.4

XINT1

T1PINT

(EV-A)

T2OFINT

(EV-A)

T3PINT

(EV-B)

T4OFINT

(EV-B)

Reserved

Reserved

Reserved

SCITXINTB

(SCI-B)

Reserved

Reserved

Reserved

INTx.3

Reserved

CMP3INT

(EV-A)

T2UFINT

(EV-A)

CMP6INT

(EV-B)

T4UFINT

(EV-B)

Reserved

Reserved

Reserved

SCIRXINTB

(SCI-B)

Reserved

Reserved

Reserved

INTx.2

PDPINTB

(EV-B)

CMP2INT

(EV-A)

T2CINT

(EV-A)

CMP5INT

(EV-B)

T4CINT

(EV-B)

SPITXINTA

(SPI)

Reserved

Reserved

SCITXINTA

(SCI-A)

Reserved

Reserved

Reserved

INTx.1

PDPINTA

(EV-A)

CMP1INT

(EV-A)

T2PINT

(EV-A)

CMP4INT

(EV-B)

T4PINT

(EV-B)

SPIRXINTA

(SPI)

Reserved

Reserved

SCIRXINTA

(SCI-A)

Reserved

Reserved

Reserved

Out of the 96 possible interrupts, 45 interrupts are currently used. The remaining interrupts are reserved for future devices. These

interrupts can be used as software interrupts if they are enabled at the PIEIFRx level, provided none of the interrupts within the group is

being used by a peripheral. Otherwise, interrupts coming in from peripherals may be lost by accidentally clearing their flag while

modifying the PIEIFR.

To summarize, there are two safe cases when the reserved interrupts could be used as software interrupts:

• No peripheral within the group is asserting interrupts.

• No peripheral interrupts are assigned to the group (example PIE group 12).

Copyright © 2001–2011, Texas Instruments Incorporated

Functional Overview

45

Product Folder Link(s):