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SPRS174S – APRIL 2001 – REVISED MARCH 2011
Table 4-3. EVA Registers
(1)
NAME
GPTCONA
T1CNT
T1CMPR
T1PR
T1CON
T2CNT
T2CMPR
T2PR
T2CON
EXTCONA
ACTRA
DBTCONA
CMPR1
CMPR2
CMPR3
CAPCONA
CAPFIFOA
CAP1FIFO
CAP2FIFO
CAP3FIFO
CAP1FBOT
CAP2FBOT
CAP3FBOT
EVAIMRA
EVAIMRB
EVAIMRC
EVAIFRA
EVAIFRB
EVAIFRC
(1)
(2)
(2)
ADDRESS
0x00 7400
0x00 7401
0x00 7402
0x00 7403
0x00 7404
0x00 7405
0x00 7406
0x00 7407
0x00 7408
0x00 7409
0x00 7411
0x00 7413
0x00 7415
0x00 7417
0x00 7418
0x00 7419
0x00 7420
0x00 7422
0x00 7423
0x00 7424
0x00 7425
0x00 7427
0x00 7428
0x00 7429
0x00 742C
0x00 742D
0x00 742E
0x00 742F
0x00 7430
0x00 7431
SIZE (x16)
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
GP Timer Control Register A
GP Timer 1 Counter Register
GP Timer 1 Compare Register
GP Timer 1 Period Register
GP Timer 1 Control Register
GP Timer 2 Counter Register
GP Timer 2 Compare Register
GP Timer 2 Period Register
GP Timer 2 Control Register
DESCRIPTION
GP Extension Control Register A
Compare Control Register A
Compare Action Control Register A
Dead-Band Timer Control Register A
Compare Register 1
Compare Register 2
Compare Register 3
Capture Control Register A
Capture FIFO Status Register A
Two-Level-Deep Capture FIFO Stack 1
Two-Level-Deep Capture FIFO Stack 2
Two-Level-Deep Capture FIFO Stack 3
Bottom Register of Capture FIFO Stack 1
Bottom Register of Capture FIFO Stack 2
Bottom Register of Capture FIFO Stack 3
Interrupt Mask Register A
Interrupt Mask Register B
Interrupt Mask Register C
Interrupt Flag Register A
Interrupt Flag Register B
Interrupt Flag Register C
COMCONA
The EV-B register set is identical except the address range is from 0x00 7500 to 0x00 753F. The above registers are mapped to Zone 2.
This space allows only 16-bit accesses. 32-bit accesses produce undefined results.
New register compared to 24x/240x
Copyright © 2001–2011, Texas Instruments Incorporated
Peripherals
59
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