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TMS320F2808, TMS320F2806
TMS320F2801, UCD9501
Digital Signal Processors
SPRS230F – OCTOBER 2003 – REVISED SEPTEMBER 2005
6-6
6-7
6-8
6-9
6-10
6-11
6-12
6-13
6-14
6-15
6-16
6-17
6-18
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6-20
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6-31
6-32
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6-34
6-35
6-36
6-37
6-38
6-39
6-40
6-41
6-42
6-43
6-44
7-1
7-2
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XCLKIN Timing Requirements - PLL Enabled
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XCLKIN Timing Requirements - PLL Disabled
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XCLKOUT Switching Characteristics (PLL Bypassed or Enabled)
.........................................................
Power Management and Supervisory Circuit Solutions
......................................................................
Reset (XRS) Timing Requirements
............................................................................................
General-Purpose Output Switching Characteristics
..........................................................................
General-Purpose Input Timing Requirements
.................................................................................
IDLE Mode Timing Requirements
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IDLE Mode Switching Characteristics
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STANDBY Mode Timing Requirements
........................................................................................
STANDBY Mode Switching Characteristics
..................................................................................
HALT Mode Timing Requirements
..............................................................................................
HALT Mode Switching Characteristics
........................................................................................
ePWM Timing Requirements
....................................................................................................
ePWM Switching Characteristics
................................................................................................
Trip-Zone input Timing Requirements
..........................................................................................
High Resolution PWM Characteristics at SYSCLKOUT = (60 - 100 MHz)
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Enhanced Capture (eCAP) Timing Requirement
............................................................................
eCAP Switching Characteristics
...............................................................................................
Enhanced Quadrature Encoder Pulse (eQEP) Timing Requirements
....................................................
eQEP Switching Characteristics
...............................................................................................
External ADC Start-of-Conversion Switching Characteristics
..............................................................
External Interrupt Timing Requirements
......................................................................................
External Interrupt Switching Characteristics
.................................................................................
I2C Timing
.......................................................................................................................
SPI Master Mode External Timing (Clock Phase = 0)
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SPI Master Mode External Timing (Clock Phase = 1)
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SPI Slave Mode External Timing (Clock Phase = 0)
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SPI Slave Mode External Timing (Clock Phase = 1)
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ADC Electrical Characteristics (over recommended operating conditions)
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ADC Power-Up Delays
..........................................................................................................
Current Consumption for Different ADC Configurations (at 12.5-MHz ADCCLK)
.......................................
Sequential Sampling Mode Timing
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Simultaneous Sampling Mode Timing
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Flash Endurance
.................................................................................................................
Flash Parameters at 100-MHz SYSCLKOUT
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Flash/OTP Access Timing
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Minimum Required Wait-States at Different Frequencies
..................................................................
F280x Thermal Model 100-pin GGM Results
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F280x Thermal Model 100-pin PZ Results
...................................................................................
Input Clock Frequency
List of Tables
7
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