TMS320C6678
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS691D—April 2013
www.ti.com
1 Features
•
Eight TMS320C66x™ DSP Core Subsystems (C66x
CorePacs), Each with
•
Peripherals
– Four Lanes of SRIO 2.1
– 1.0 GHz or 1.25 GHz C66x Fixed/Floating-Point
›
1.24/2.5/3.125/5 GBaud Operation Supported
Per Lane
CPU Core
›
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40 GMAC/Core for Fixed Point @ 1.25 GHz
20 GFLOP/Core for Floating Point @ 1.25 GHz
›
›
Supports Direct I/O, Message Passing
Supports Four 1×, Two 2×, One 4×, and Two 1× +
One 2× Link Configurations
– Memory
›
›
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32K Byte L1P Per Core
32K Byte L1D Per Core
512K Byte Local L2 Per Core
•
Multicore Shared Memory Controller (MSMC)
– 4096KB MSM SRAM Memory Shared by Eight DSP
C66x CorePacs
– Memory Protection Unit for Both MSM SRAM and
DDR3_EMIF
•
•
Multicore Navigator
– 8192 Multipurpose Hardware Queues with Queue
Manager
– Packet-Based DMA for Zero-Overhead Transfers
– 16-Bit EMIF
– Two Telecom Serial Ports (TSIP)
Network Coprocessor
– Packet Accelerator Enables Support for
›
›
Supports 1024 DS0s Per TSIP
Supports 2/4/8 Lanes at 32.768/16.384/8.192
Mbps Per Lane
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›
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Transport Plane IPsec, GTP-U, SCTP, PDCP
L2 User Plane PDCP (RoHC, Air Ciphering)
1-Gbps Wire-Speed Throughput at 1.5 MPackets
Per Second
– UART Interface
– I2C Interface
– 16 GPIO Pins
– Security Accelerator Engine Enables Support for
›
IPSec, SRTP, 3GPP, WiMAX Air Interface, and
SSL/TLS Security
– SPI Interface
›
ECB, CBC, CTR, F8, A5/3, CCM, GCM, HMAC,
CMAC, GMAC, AES, DES, 3DES, Kasumi, SNOW
3G, SHA-1, SHA-2 (256-bit Hash), MD5
– Semaphore Module
– Sixteen 64-Bit Timers
– Three On-Chip PLLs
›
Up to 2.8 Gbps Encryption Speed
•
•
Commercial Temperature:
– 0°C to 85°C
Extended Temperature:
– - 40°C to 100°C
Copyright 2013 Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
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