TMP175
TMP75
www.ti.com
SBOS288J − JANUARY 2004 − REVISED DECEMBER 2007
1
SCL
9
1
9
…
…
SDA
Start By
Master
1
0
0
1
0
0
0
R/W
0
0
0
0
0
0
P1
P0
ACK By
TMP175
or
TMP75
Frame 1 Two−Wire Slave Address Byte
1
9
1
ACK By
TMP175
or
TMP75
Frame 2 Pointer Register Byte
9
SCL
(Continued)
…
…
ACK By
Master
SDA
(Continued)
Start By
Master
1
0
0
1
0
0
0
R/W
D7
D6
D5
D4
D3
D2
D1
D0
ACK By
TMP175
or
TMP75
Frame 3 Two−Wire Slave Address Byte
From
TMP175
or
TMP75
Frame 4 Data Byte 1 Read Register
1
SCL
(Continued)
9
SDA
(Continued)
D7
D6
D5
D4
D3
D2
D1
D0
ACK By
Master
Stop By
Master
NOTE: Address Pins A0, A1, A2 = 0
From
TMP175
or
TMP75
Frame 5 Data Byte 2 Read Register
Figure 7. Two-Wire Timing Diagram for Read Word Format
ALERT
1
SCL
9
1
9
SDA
Start By
Master
0
0
0
1
1
0
0
R/W
1
0
0
1
0
0
0
S ta tu s
ACK By
TMP175
or
TMP75
Frame 1 SMBus ALERT Response Address Byte
From
NACK By
TMP175
or
TMP75
Master
Frame 2 Slave Address Byte
Stop By
Master
NOTE: Address Pins A0, A1, A2 = 0
Figure 8. Timing Diagram for SMBus ALERT
12
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