EXAMPLE BOARD LAYOUT
B3QFN - 4.1 mm max height
PLASTIC QUAD FLAT PACK- NO LEAD
RDL0020A
PKG
4X (1.4)
(Ø0.2) VIA
TYP
4X (0.5)
(0.5) TYP
16
1
2X (0.925)
17
10X (0.25)
(1.075) TYP
18
PKG
2X (0.538)
10X (0.50)
19
4X (0.875)
20
10X (0.9)
2X (0.875)
8
9
(R0.05) TYP
4X (1.58)
(4)
(4.5)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 15X
0.05 MAX
ALL AROUND
0.05 MAX
ALL AROUND
EXPOSED
METAL
EXPOSED
METAL
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL EDGE
SOLDER MASK
DEFINED
NON- SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4226416/B 04/2021
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
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