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TLV320AIC23BPWRG4 参数 Datasheet PDF下载

TLV320AIC23BPWRG4图片预览
型号: TLV320AIC23BPWRG4
PDF下载: 下载PDF文件 查看货源
内容描述: 具有集成耳机放大器立体声音频编解码8至96 kHz [STEREO AUDIO CODEC 8 TO 96 KHZ WITH INTEGRATED HEADPHONE AMPLIFIER]
分类和应用: 消费电路商用集成电路放大器光电二极管
文件页数/大小: 50 页 / 490 K
品牌: TI [ TEXAS INSTRUMENTS ]
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1.4 Ordering Information  
PACKAGE  
28-Pin  
T
A
32-Pin  
28-Pin  
MicroStar Junior GQE/ZQE  
TLV320AIC23BGQE/ZQE  
TLV320AIC23BIGQE/ZQE  
TSSOP PW  
PQFP RHD  
−10°C to 70°C  
−40°C to 85°C  
TLV320AIC23BPW  
TLV320AIC23BIPW  
TLV320AIC23BRHD  
TLV320AIC23BIRHD  
1.5 Terminal Functions  
TERMINAL  
NO.  
I/O  
DESCRIPTION  
NAME  
GQE/  
ZQE  
PW  
RHD  
AGND  
5
4
15  
14  
3
12  
11  
28  
Analog supply return  
Analog supply input. Voltage level is 3.3 V nominal.  
AVDD  
BCLK  
2
23  
I/O  
I S serial-bit clock. In audio master mode, the AIC23B generates this signal and sends it to the  
DSP. In audio slave mode, the signal is generated by the DSP.  
BVDD  
21  
22  
1
2
26  
27  
Buffer supply input. Voltage range is from 2.7 V to 3.6 V.  
CLKOUT  
O
I
Clock output. This is a buffered version of the XTI input and is available in 1X or 1/2X frequencies  
of XTI. Bit 07 in the sample rate control register controls frequency selection.  
CS  
12  
21  
18  
Control port input latch/address select. For SPI control mode this input acts as the data latch  
control. For 2-wire control mode this input defines the seventh bit in the device address field.  
See Section 3.1 for details.  
2
DIN  
24  
20  
27  
19  
32  
29  
30  
4
28  
6
1
25  
3
I
I S format serial data input to the sigma-delta stereo DAC  
DGND  
DOUT  
DVDD  
HPGND  
HPVDD  
LHPOUT  
Digital supply return  
2
O
I S format serial data output from the sigma-delta stereo ADC  
27  
11  
8
24  
8
Digital supply input. Voltage range is 1.4 V to 3.6 V.  
Analog headphone amplifier supply return  
5
Analog headphone amplifier supply input. Voltage level is 3.3 V nominal.  
9
6
O
I
Left stereo mixer-channel amplified headphone output. Nominal 0-dB output level is 1 V  
Gain of –73 dB to 6 dB is provided in 1-dB steps.  
.
RMS  
LLINEIN  
11  
20  
17  
Left stereo-line input channel. Nominal 0-dB input level is 1 V  
provided in 1.5-dB steps.  
. Gain of –34.5 dB to 12 dB is  
RMS  
LOUT  
2
12  
5
9
2
O
Left stereo mixer-channel line output. Nominal output level is 1.0 V .  
RMS  
2
LRCIN  
26  
I/O  
I S DAC-word clock signal. In audio master mode, the AIC23B generates this framing signal  
and sends it to the DSP. In audio slave mode, the signal is generated by the DSP.  
2
LRCOUT  
MICBIAS  
MICIN  
28  
7
7
4
I/O  
I S ADC-word clock signal. In audio master mode, the AIC23B generates this framing signal  
and sends it to the DSP. In audio slave mode, the signal is generated by the DSP.  
17  
18  
22  
14  
15  
19  
O
I
Buffered low-noise-voltage output suitable for electret-microphone-capsule biasing. Voltage  
level is 3/4 AVDD nominal.  
8
Buffered amplifier input suitable for use with electret-microphone capsules. Without external  
resistors a default gain of 5 is provided. See Section 2.3.1.2 for details.  
MODE  
NC  
13  
I
Serial-interface-mode input. See Section 3.1 for details.  
Not Used—No internal connection  
1, 9  
17, 25  
RHPOUT  
RLINEIN  
ROUT  
31  
10  
3
10  
19  
13  
7
O
I
Right stereo mixer-channel amplified headphone output. Nominal 0-dB output level is 1 V  
Gain of −73 dB to 6 dB is provided in 1-dB steps.  
.
RMS  
16  
10  
Right stereo-line input channel. Nominal 0-dB input level is 1 V  
provided in 1.5-dB steps.  
. Gain of –34.5 dB to 12 dB is  
RMS  
O
Right stereo mixer-channel line output. Nominal output level is 1.0 V .  
RMS  
1−5