1.2 Functional Block Diagram
VMID
AVDD
1.0X
50 kΩ
VDAC
1.0X
50 kΩ
AGND
1.0X
Control
Interface
VADC
CS
SDIN
SCLK
MODE
DSPcodec
TLV320AIC23B
VMID
1.5X
MICBIAS
12 to −34.5 dB,
1.5 dB Steps
RLINEIN
Line
Mute
2:1
MUX
Σ−∆
ADC
50 kΩ
10 kΩ
MICIN
Bypass Mute,
Mute 0 dB, 20 dB
VADC
VMID
LLINEIN
12 to −34 dB,
1.5 dB Steps
HPVDD
HPGND
RHPOUT
ROUT
LOUT
LHPOUT
Headphone
Driver
6 to −73 dB,
1 dB Steps
VDAC
Headphone
Driver
6 to −73 dB,
1 dB Steps
Bypass
Mute
Line
Mute
2:1
MUX
Σ−∆
ADC
Side Tone
Mute
DVDD
Digital
Filters
BVDD
DGND
Σ
Σ−∆
DAC
Σ
CLKIN
Divider
(1x, 1/2x)
Σ−∆
DAC
LRCIN
XTI/MCLK
XTO
CLKOUT
OSC
CLKOUT
Divider
(1x, 1/2x)
Digital
Audio
Interface
DIN
LRCOUT
DOUT
BCLK
NOTE: MCLK, BCLK, and SCLK are all asynchronous to each other.
1−3