TLC5615CP 参数 Datasheet PDF下载

TLC5615C, TLC5615I

10-BIT DIGITAL-TO-ANALOG CONVERTERS

SLAS142C – OCTOBER 1996 – REVISED MARCH 2000

PARAMETER MEASUREMENT INFORMATION

CS

th(CSH0)

tsu(CSS)

tw(CH)

tw(CL)

th(CSH1)

tw(CS)

SCLK

See Note A

See Note C

th(DH)

tsu(DS)

DIN

tpd(DOUT)

MSB

DOUT

Previous LSB

See Note B

NOTES: A. The input clock, applied at the SCLK terminal, should be inhibited low when CS is high to minimize clock feedthrough.

B. Data input from preceeding conversion cycle.

C. Sixteenth SCLK falling edge

Figure 1. Timing Diagram

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See Note A

LSB

tsu(CS1)

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