TLC5510, TLC5510A
8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS
SLAS095K – SEPTEMBER 1994 – REVISED MAY 1999
APPLICATION INFORMATION
DVDD
5V
C12
AVDD
5V
VREF
ADJ
FB3
C8
R5
FB2
FB7
Video
Input
J1
C1
Q1
D1
R4
R1
C2
D3
–5V
TP3
C10
C4
D2
JP3 JP4
22
23
24
C5
20
21
R3
C11
FB1
R2
C6
19
TP1
C3
C9
18
VDDA
ANALOG IN
AGND
AGND
D5
D4
D3
D2
7
6
5
4
3
2
1
Output
Enable
JP1 JP2
C7
16
17
REFTS
REFT
D7
D6
9
8
15
TLC5510
13
14
VDDD
VDDA
VDDA
CLK
VDDD
D8 (MSB)
12
11
10
C11
Clock
REFBS D1 (LSB)
REFB
DGND
DGND
OE
NOTE A: Shorting JP1 and JP3 allows adjustment of the reference voltage by R5 using temperature-compensating diodes D2 and D3
which compensate for D1 and Q1 variations. By shorting JP2 and JP4, the internal divider generates a nominal 2-V reference.
LOCATION
C1, C3 – C4, C6 – C12
C2
C5
FB1, FB2, FB3, FB7
Q1
R1, R3
R2
R4
R5
0.1-µF capacitor
10-pF capacitor
47-µF capacitor
Ferrite bead
2N3414 or equivalent
75-Ω resistor
500-Ω resistor
10-kΩ resistor, clamp voltage adjust
300-Ω resistor, reference-voltage fine adjust
DESCRIPTION
Figure 5. TLC5510 Evaluation and Test Schematic
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
9